arch/x86: Flip HAVE_MONOTONIC_TIMER default

Change-Id: Id56139a3d0840684b13179821a77bc8ae28e05ae
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34113
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Kyösti Mälkki
2019-07-01 15:38:25 +03:00
parent 76c4386699
commit b28b6b53cc
16 changed files with 4 additions and 14 deletions

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@@ -7,7 +7,6 @@ config CPU_AMD_MODEL_10XXX
select SSE2
select TSC_SYNC_LFENCE
select UDELAY_LAPIC
select HAVE_MONOTONIC_TIMER
select SUPPORT_CPU_UCODE_IN_CBFS
select CPU_MICROCODE_MULTIPLE_FILES
select ACPI_HUGE_LOWMEM_BACKUP

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@@ -10,7 +10,6 @@ config CPU_SPECIFIC_OPTIONS
select ARCH_VERSTAGE_X86_32
select ARCH_ROMSTAGE_X86_32
select ARCH_RAMSTAGE_X86_32
select HAVE_MONOTONIC_TIMER
select SMP
select MMX
select SSE2

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@@ -26,6 +26,7 @@ config SLOT_SPECIFIC_OPTIONS # dummy
select CPU_INTEL_MODEL_6BX
select CPU_INTEL_MODEL_6XX
select NO_SMM
select NO_MONOTONIC_TIMER
config DCACHE_RAM_BASE
hex

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@@ -21,5 +21,6 @@ config CPU_QEMU_X86
select ARCH_RAMSTAGE_X86_32
select SMP
select UDELAY_TSC
select NO_MONOTONIC_TIMER
select C_ENVIRONMENT_BOOTBLOCK
select SMM_ASEG

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@@ -26,6 +26,7 @@ config CPU_SPECIFIC_OPTIONS
select ARCH_ROMSTAGE_X86_32
select ARCH_RAMSTAGE_X86_32
select UDELAY_TSC
select NO_MONOTONIC_TIMER
select MMX
select SSE2
select SUPPORT_CPU_UCODE_IN_CBFS

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@@ -24,7 +24,6 @@ config UDELAY_LAPIC
config LAPIC_MONOTONIC_TIMER
def_bool n
depends on UDELAY_LAPIC
select HAVE_MONOTONIC_TIMER
help
Expose monotonic time using the local APIC.
@@ -45,7 +44,6 @@ config TSC_CONSTANT_RATE
config TSC_MONOTONIC_TIMER
def_bool n
depends on UDELAY_TSC
select HAVE_MONOTONIC_TIMER
help
Expose monotonic time using the TSC.