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google/cyan: fix FSP memory init params

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In the original Chromium source, PcdMemorySpdPtr is only set for
cyan, but none of the other Braswell variants. When upstreamed,
it was left set for all boards as it didn't appear to be problematic.
In wider testing, I came across one reks board for which it caused
FSP memory init to fail, so restricting the parameter to cyan only
as it was originally.

TEST: build/boot google/reks with Micron EDF8132A3MA-JD-F RAM,
observe board now successfully boots where it did not previously.

Change-Id: Iacfbd4bc89fa04717baf85704181d346bca2ed2f
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/22782
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Matt DeVillier 2017-12-07 20:34:08 -06:00 committed by Martin Roth
parent 950252675a
commit b3937bb108
1 changed files with 5 additions and 3 deletions
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8
src/mainboard/google/cyan/romstage.c
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@ -33,11 +33,13 @@ void mainboard_memory_init_params(struct romstage_params *params,
MEMORY_INIT_UPD *memory_params)
{
/* Update SPD data */
if (IS_ENABLED(CONFIG_BOARD_GOOGLE_CYAN))
if (IS_ENABLED(CONFIG_BOARD_GOOGLE_CYAN)) {
memory_params->PcdMemoryTypeEnable = MEM_DDR3;
else
memory_params->PcdMemorySpdPtr =
(u32)params->pei_data->spd_data_ch0;
} else
memory_params->PcdMemoryTypeEnable = MEM_LPDDR3;
memory_params->PcdMemorySpdPtr = (u32)params->pei_data->spd_data_ch0;
memory_params->PcdMemChannel0Config = params->pei_data->spd_ch0_config;
memory_params->PcdMemChannel1Config = params->pei_data->spd_ch1_config;