cpu/intel/model_206ax: Use tsc monotonic timer
Switch from lapic to tsc. Allows timestamps to be used in coreboot, as there's a reference clock available to calculate correct time units. Clean Kconfig, remove duplicated lapic code and include tsc dir for LGA1155 boards. Tested on Lenovo T430. Change-Id: I849ca2b3908116d9d22907039cd6e4464444b1d1 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/20044 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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Martin Roth
parent
21e7424fc9
commit
b9959e279c
@@ -14,12 +14,13 @@ config CPU_SPECIFIC_OPTIONS
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select ARCH_RAMSTAGE_X86_32
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select SMP
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select SSE2
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select UDELAY_LAPIC
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select UDELAY_TSC
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select TSC_CONSTANT_RATE
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select TSC_MONOTONIC_TIMER
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select SMM_TSEG
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select SUPPORT_CPU_UCODE_IN_CBFS
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#select AP_IN_SIPI_WAIT
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select TSC_SYNC_MFENCE
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select LAPIC_MONOTONIC_TIMER
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select CPU_INTEL_COMMON
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config BOOTBLOCK_CPU_INIT
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