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soc/intel/meteorlake: Determine TBT controllers exist by VID/DID

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The original code uses TRE0-TRE3 register to determine whether or not
the TBT controller exists. However, there is a remap in fsp could confuse
the TRPx._STA.
Ex:
    Disable TBT controller 0 on b:0 d:7 f:0
    Enable TBT controller 1 on b:0 d:7 f:1
The FSP will do the remap and after the remap:
    TBT controller 1 is on b:0 d:7 f:0
    TBT controller 0 is on b:0 d:7 f:1

This is becuase func 0 must exist per pci spec.
However, the TRE0-TRE3 will not be remapped so that the ACPI
TRPx._STA method could be confused.
In such scenario, TRP0._STA will return 0x0, TRP1._STA will return
0xf which is wrong because TBT controller 1 is now at b:0 d:7 f:0

TEST=tested on rex and _TRPx._STA returns correctly. TBT function OK

Change-Id: I54f2ea99cd1ec73dd0b71a6ba738aa927b0ae80f
Signed-off-by: Kane Chen <kane.chen@intel.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81842
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
This commit is contained in:
Kane Chen 2024-04-12 21:16:32 +08:00 committed by Felix Held
parent 8c927c4dbf
commit b9d489e01d
1 changed files with 4 additions and 4 deletions
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8
src/soc/intel/meteorlake/acpi/tcss.asl
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@ -718,7 +718,7 @@ Scope (\_SB.PCI0)
Method (_STA, 0x0, NotSerialized)
{
If (TRE0 == 1) {
If (VDID != 0xFFFFFFFF) {
Return (0x0F)
} Else {
Return (0x0)
@ -748,7 +748,7 @@ Scope (\_SB.PCI0)
Method (_STA, 0x0, NotSerialized)
{
If (TRE1 == 1) {
If (VDID != 0xFFFFFFFF) {
Return (0x0F)
} Else {
Return (0x0)
@ -778,7 +778,7 @@ Scope (\_SB.PCI0)
Method (_STA, 0x0, NotSerialized)
{
If (TRE2 == 1) {
If (VDID != 0xFFFFFFFF) {
Return (0x0F)
} Else {
Return (0x0)
@ -808,7 +808,7 @@ Scope (\_SB.PCI0)
Method (_STA, 0x0, NotSerialized)
{
If (TRE3 == 1) {
If (VDID != 0xFFFFFFFF) {
Return (0x0F)
} Else {
Return (0x0)