skl mainboards/dt: Drop SataPortsDevSlp[x] setting if disabled

The attributes are initialized with 0 and thus setting them to 0 makes
them superfluous. Remove them.

Change-Id: I572a9092633c61907794ecbbbe431066d889c5fb
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83177
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

src/mainboard/libretrend/lt1000/devicetree.cb

@@ -38,11 +38,6 @@ chip soc/intel/skylake
 		[1] = 1,
 		[2] = 1,
 	}"
-	register "SataPortsDevSlp" = "{
-		[0] = 0,
-		[1] = 0,
-		[2] = 0,
-	}"
 	register "SataSpeedLimit" = "2"
 	register "DspEnable" = "1"
 	register "IoBufferOwnership" = "0"

src/mainboard/protectli/vault_kbl/devicetree.cb

@@ -109,8 +109,6 @@ chip soc/intel/skylake
 	# Enable SATA ports 1,2
 	register "SataPortsEnable[0]" = "1"
 	register "SataPortsEnable[1]" = "1"
-	register "SataPortsDevSlp[0]" = "0"
-	register "SataPortsDevSlp[1]" = "0"
 
 	# Enable Root ports. 1-6 for LAN and Root Port 9
 	register "PcieRpEnable[0]" = "1"

src/mainboard/purism/librem_skl/devicetree.cb

@@ -43,8 +43,6 @@ chip soc/intel/skylake
 	# FSP Configuration
 	register "SataPortsEnable[0]" = "1"
 	register "SataPortsEnable[2]" = "1"
-	register "SataPortsDevSlp[0]" = "0"
-	register "SataPortsDevSlp[2]" = "0"
 	register "DspEnable" = "0"
 	register "IoBufferOwnership" = "0"
 	register "SkipExtGfxScan" = "1"