cpu/x86/smm: Use common SMM_ASEG region
Change-Id: Idca56583c1c8dc41ad11d915ec3e8be781fb4e48 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69665 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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@@ -29,14 +29,10 @@ endif
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smm-y += save_state.c
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ifeq ($(CONFIG_SMM_TSEG),y)
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ramstage-y += tseg_region.c
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romstage-y += tseg_region.c
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postcar-y += tseg_region.c
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endif
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ifeq ($(CONFIG_PARALLEL_MP),y)
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smmstub-y += smm_stub.S
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@@ -409,11 +409,6 @@ static int append_and_check_region(const struct region smram,
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int smm_load_module(const uintptr_t smram_base, const size_t smram_size,
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struct smm_loader_params *params)
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{
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if (CONFIG(SMM_ASEG) && (smram_base != SMM_BASE || smram_size != SMM_CODE_SEGMENT_SIZE)) {
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printk(BIOS_ERR, "SMM base & size are 0x%lx, 0x%zx, but must be 0x%x, 0x%x\n",
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smram_base, smram_size, SMM_BASE, SMM_CODE_SEGMENT_SIZE);
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return -1;
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}
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/*
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* Place in .bss to reduce stack usage.
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* TODO: once CPU_INFO_V2 is used everywhere, use smaller stack for APs and move
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@@ -26,7 +26,12 @@ int smm_subregion(int sub, uintptr_t *start, size_t *size)
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const size_t ied_size = CONFIG_IED_REGION_SIZE;
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const size_t cache_size = CONFIG_SMM_RESERVED_SIZE;
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smm_region(&sub_base, &sub_size);
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if (CONFIG(SMM_TSEG))
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smm_region(&sub_base, &sub_size);
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else if (CONFIG(SMM_ASEG))
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aseg_region(&sub_base, &sub_size);
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else
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return -1;
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ASSERT(IS_ALIGNED(sub_base, sub_size));
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ASSERT(sub_size > (cache_size + ied_size));
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