soc/amd/picasso/Makefile: move PSP_NVRAM_[BASE,SIZE]
Move PSP_NVRAM_BASE and PSP_NVRAM_SIZE from the BIOS directory table items to the PSP Directory Table items, since the corresponding region will be referenced by the PSP directory table and not the BIOS directory table. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Iff7568ea05c701ecd346cc7590cf93b091ff31a2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/83813 Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
This commit is contained in:
parent
f9af266189
commit
bcc9ad50f9
@ -83,6 +83,11 @@ ifeq ($(CONFIG_PSP_LOAD_S0I3_FW),y)
|
||||
OPT_PSP_LOAD_S0I3_FW="--load-s0i3"
|
||||
endif
|
||||
|
||||
# type = 0x04
|
||||
# The flashmap section used for this is expected to be named PSP_NVRAM
|
||||
PSP_NVRAM_BASE=$(call get_fmap_value,FMAP_SECTION_PSP_NVRAM_START)
|
||||
PSP_NVRAM_SIZE=$(call get_fmap_value,FMAP_SECTION_PSP_NVRAM_SIZE)
|
||||
|
||||
# type = 0x3a
|
||||
ifeq ($(CONFIG_HAVE_PSP_WHITELIST_FILE),y)
|
||||
PSP_WHITELIST_FILE=$(CONFIG_PSP_WHITELIST_FILE)
|
||||
@ -91,11 +96,6 @@ endif
|
||||
# BIOS Directory Table items - proper ordering is managed by amdfwtool
|
||||
#
|
||||
|
||||
# type = 0x4
|
||||
# The flashmap section used for this is expected to be named PSP_NVRAM
|
||||
PSP_NVRAM_BASE=$(call get_fmap_value,FMAP_SECTION_PSP_NVRAM_START)
|
||||
PSP_NVRAM_SIZE=$(call get_fmap_value,FMAP_SECTION_PSP_NVRAM_SIZE)
|
||||
|
||||
# type = 0x7
|
||||
# RSA 2048 signature
|
||||
#ifeq ($(CONFIG_PSP_PLATFORM_SECURE_BOOT),y)
|
||||
|
Loading…
x
Reference in New Issue
Block a user