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mb/system76/mtl: Enable EnableTcssCovTypeA configs

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Change-Id: Ide0d313257e6778664a9d5dc2efb38264e5cac69
Signed-off-by: Tim Crawford <tcrawford@system76.com>
This commit is contained in:
Tim Crawford 2024-08-30 11:36:46 -06:00
parent df4d2004e7
commit beb8d7b318
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GPG Key ID: 68E558D2BBD856E3
2 changed files with 3 additions and 3 deletions
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2
src/mainboard/system76/mtl/variants/darp10/ramstage.c
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@ -9,7 +9,7 @@ void mainboard_silicon_init_params(FSP_S_CONFIG *params)
// BIT 4:5 is reserved
// BIT 6 is orientational
// BIT 7 is enable
//params->EnableTcssCovTypeA[1] = 0x82;
params->EnableTcssCovTypeA[1] = 0x82;
// XXX: Enabling C10 reporting causes system to constantly enter and
// exit opportunistic suspend when idle.

4
src/mainboard/system76/mtl/variants/lemp13/ramstage.c
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@ -11,8 +11,8 @@ void mainboard_silicon_init_params(FSP_S_CONFIG *params)
// BIT 4:5 is reserved
// BIT 6 is orientational
// BIT 7 is enable
//params->EnableTcssCovTypeA[1] = 0x81;
//params->EnableTcssCovTypeA[3] = 0x85;
params->EnableTcssCovTypeA[1] = 0x81;
params->EnableTcssCovTypeA[3] = 0x85;
// Disable reporting CPU C10 state over eSPI (causes LED flicker).
params->PchEspiHostC10ReportEnable = 0;