mb/google/nissa/var/uldren: Modify WWAN power sequence
Follow spec[1] to modify WWAN power sequence. The WWAN power sequence of warm reset is fail. The correct sequence is WWAN_EN should keep high when doing warm reset. Set GPP_D6 to PWROK which is not to do PAD reset when warm reset. [1]: [JDB10] FC ADL-N_WWAN sequence_FM101-GL SDX12 Power Timing Review_V1.6_20230602.xlsx BUG=b:285065375 BRANCH=firmware-nissa-15217.B TEST=1. emerge-nissa coreboot chromeos-bootimage 2. power sequence meets spec. Change-Id: If59630dbd10e971c91e01f33a657c01d857bc0b9 Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75690 Reviewed-by: Derek Huang <derekhuang@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@@ -20,7 +20,7 @@ static const struct pad_config override_gpio_table[] = {
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/* C1 : SMBDA==> TCHSCR_RST_L */
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PAD_CFG_GPO(GPP_C1, 1, DEEP),
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/* D6 : SRCCLKREQ1# ==> WWAN_EN */
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PAD_CFG_GPO(GPP_D6, 1, DEEP),
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PAD_CFG_GPO(GPP_D6, 1, PWROK),
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/* D7 : SRCCLKREQ2# ==> NC */
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PAD_NC(GPP_D7, NONE),
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/* D8 : SRCCLKREQ3# ==> NC */
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@@ -61,8 +61,6 @@ static const struct pad_config early_gpio_table[] = {
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PAD_CFG_GPI_APIC(GPP_A13, NONE, PLTRST, LEVEL, INVERT),
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/* B15 : HP_RST_ODL */
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PAD_CFG_GPO(GPP_B15, 0, DEEP),
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/* D6 : SRCCLKREQ1# ==> WWAN_EN */
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PAD_CFG_GPO(GPP_D6, 1, DEEP),
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/* E12 : THC0_SPI1_IO1 ==> SOC_WP_OD */
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PAD_CFG_GPI_GPIO_DRIVER(GPP_E12, NONE, DEEP),
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/* F12 : GSXDOUT ==> WWAN_RST_L */
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