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soc/intel/jasperlake: Switch to SOC_INTEL_COMMON_DEBUG_CONSENT

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This patch drops the SoC-specific config option
`SOC_INTEL_JASPERLAKE_DEBUG_CONSENT`.

Additionally, updates the FSP configuration to use the new generic
config option.

TEST=Able to build and boot google/dedede without any functional
impact while debugging.

Change-Id: I3e7abaf5fb3a0d5528041af5ce767a15fc738870
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83960
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Subrata Banik 2024-08-17 18:25:15 +00:00 committed by Felix Held
parent 79a688e761
commit c41a21d825
2 changed files with 1 additions and 17 deletions
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16
src/soc/intel/jasperlake/Kconfig
View File

@ -192,22 +192,6 @@ config FSP_HEADER_PATH
config FSP_FD_PATH
default "3rdparty/fsp/JasperLakeFspBinPkg/Fsp.fd"
config SOC_INTEL_JASPERLAKE_DEBUG_CONSENT
int "Debug Consent for JSL"
# USB DBC is more common for developers so make this default to 3 if
# SOC_INTEL_DEBUG_CONSENT=y
default 3 if SOC_INTEL_DEBUG_CONSENT
default 0
help
This is to control debug interface on SOC.
Setting non-zero value will allow to use DBC or DCI to debug SOC.
PlatformDebugConsent in FspmUpd.h has the details.
Desired platform debug type are
0:Disabled, 1:Enabled (DCI OOB+[DbC]), 2:Enabled (DCI OOB),
3:Enabled (USB3 DbC), 4:Enabled (XDP/MIPI60), 5:Enabled (USB2 DbC),
6:Enable (2-wire DCI OOB), 7:Manual
config PRERAM_CBMEM_CONSOLE_SIZE
hex
default 0x1400

2
src/soc/intel/jasperlake/romstage/fsp_params.c
View File

@ -96,7 +96,7 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg,
m_cfg->SmbusEnable = config->SmbusEnable;
/* Set debug probe type */
m_cfg->PlatformDebugConsent = CONFIG_SOC_INTEL_JASPERLAKE_DEBUG_CONSENT;
m_cfg->PlatformDebugConsent = CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT;
/* VT-d config */
m_cfg->VtdDisable = 0;