soc/intel/elkhartlake: Switch to SOC_INTEL_COMMON_DEBUG_CONSENT
This patch drops the SoC-specific config option `SOC_INTEL_ELKHARTLAKE_DEBUG_CONSENT`. Additionally, updates the FSP configuration to use the new generic config option. TEST=Able to build and boot intel/elkhartlake_crb without any functional impact while debugging. Change-Id: Idb8db7230c432792e742218d41d891c529b2114f Signed-off-by: Subrata Banik <subratabanik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83959 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -240,22 +240,6 @@ config EHL_TSN_DRIVER
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Enable TSN GbE driver to provide board specific settings in the GBE MAC.
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As an example of a possible change, the MAC address could be adjusted.
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config SOC_INTEL_ELKHARTLAKE_DEBUG_CONSENT
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int "Debug Consent for EHL"
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# USB DBC is more common for developers so make this default to 3 if
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# SOC_INTEL_DEBUG_CONSENT=y
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default 3 if SOC_INTEL_DEBUG_CONSENT
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default 0
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help
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This is to control debug interface on SOC.
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Setting non-zero value will allow to use DBC or DCI to debug SOC.
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PlatformDebugConsent in FspmUpd.h has the details.
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Desired platform debug type are
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0:Disabled, 1:Enabled (DCI OOB+[DbC]), 2:Enabled (DCI OOB),
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3:Enabled (USB3 DbC), 4:Enabled (XDP/MIPI60), 5:Enabled (USB2 DbC),
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6:Enable (2-wire DCI OOB), 7:Manual
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config PRERAM_CBMEM_CONSOLE_SIZE
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hex
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default 0x1400
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@ -132,7 +132,7 @@ static void fill_fsp_debug_params(FSP_M_CONFIG *m_cfg,
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m_cfg->SerialIoUartDebugControllerNumber = CONFIG_UART_FOR_CONSOLE;
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/* Set debug probe type */
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m_cfg->PlatformDebugConsent = CONFIG_SOC_INTEL_ELKHARTLAKE_DEBUG_CONSENT;
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m_cfg->PlatformDebugConsent = CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT;
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/* TraceHub configuration */
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if (is_devfn_enabled(PCH_DEVFN_TRACEHUB) && config->TraceHubMode) {
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