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soc/intel/cannonlake: Switch to SOC_INTEL_COMMON_DEBUG_CONSENT

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This patch drops the SoC-specific config option
`SOC_INTEL_CANNONLAKE_DEBUG_CONSENT`.

Additionally, updates the FSP configuration to use the new generic
config option.

TEST=Able to build and boot google/hatch without any functional impact
while debugging.

Change-Id: Ifad11652b5fa6ff14f713f55a721cdbbfbfde471
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83958
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Subrata Banik 2024-08-17 18:16:15 +00:00 committed by Felix Held
parent 6fc13b08f8
commit d949bca67b
2 changed files with 1 additions and 13 deletions
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11
src/soc/intel/cannonlake/Kconfig
View File

@ -321,17 +321,6 @@ config FSP_FD_PATH
config FSP_FD_PATH_2
default "3rdparty/fsp/CometLakeFspBinPkg/CometLake2/Fsp.fd" if SOC_INTEL_COMETLAKE_1_2
config SOC_INTEL_CANNONLAKE_DEBUG_CONSENT
int "Debug Consent for CNL"
# USB DBC is more common for developers so make this default to 3 if
# SOC_INTEL_DEBUG_CONSENT=y
default 3 if SOC_INTEL_DEBUG_CONSENT
default 0
help
This is to control debug interface on SOC.
Setting non-zero value will allow to use DBC or DCI to debug SOC.
PlatformDebugConsent in FspmUpd.h has the details.
config PRERAM_CBMEM_CONSOLE_SIZE
hex
default 0xe00

3
src/soc/intel/cannonlake/romstage/fsp_params.c
View File

@ -124,8 +124,7 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
m_cfg->SmbusEnable = is_devfn_enabled(PCH_DEVFN_SMBUS);
/* Set debug probe type */
m_cfg->PlatformDebugConsent =
CONFIG_SOC_INTEL_CANNONLAKE_DEBUG_CONSENT;
m_cfg->PlatformDebugConsent = CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT;
/* Configure VT-d */
tconfig->VtdDisable = 0;