soc/amd: Create AMD common reset code
This allows us to use the same file for PCO, CZN, MDN, PHX, & Glinda. PCO supports the warm reset, and future chips can support it by setting the SOC_AMD_SUPPORTS_WARM_RESET option. Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: Ib6459e7ab82aacbe57b4c2fc5bbb3759dc5266f7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/72658 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@@ -3,9 +3,11 @@
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#ifndef AMD_BLOCK_RESET_H
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#define AMD_BLOCK_RESET_H
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#include <console/console.h>
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#include <amdblocks/acpimmio.h>
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#include <arch/cache.h>
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#include <console/console.h>
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#include <halt.h>
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#include <soc/southbridge.h>
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void do_warm_reset(void);
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void do_cold_reset(void);
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@@ -28,4 +30,10 @@ static inline __noreturn void cold_reset(void)
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halt();
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}
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static inline void set_resets_to_cold(void)
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{
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/* De-assert and then assert all PwrGood signals on CF9 reset. */
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pm_write16(PWR_RESET_CFG, pm_read16(PWR_RESET_CFG) | TOGGLE_ALL_PWR_GOOD);
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}
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#endif /* AMD_BLOCK_RESET_H */
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@@ -15,3 +15,14 @@ config SOC_AMD_COMMON_BLOCK_PM_CHIPSET_STATE_SAVE
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platforms that use FSP for hardware initialization.
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endif # SOC_AMD_COMMON_BLOCK_PM
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config SOC_AMD_COMMON_BLOCK_RESET
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bool
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help
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Select this option to use AMD common reset driver support.
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config SOC_AMD_SUPPORTS_WARM_RESET
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bool
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depends on SOC_AMD_COMMON_BLOCK_RESET
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help
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Select this option if the chip supports warm reset.
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@@ -1,5 +1,13 @@
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## SPDX-License-Identifier: GPL-2.0-only
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bootblock-$(CONFIG_SOC_AMD_COMMON_BLOCK_PM) += pmlib.c
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bootblock-$(CONFIG_SOC_AMD_COMMON_BLOCK_RESET) += reset.c
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verstage_x86-$(CONFIG_SOC_AMD_COMMON_BLOCK_RESET) += reset.c
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romstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_PM_CHIPSET_STATE_SAVE) += chipset_state.c
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romstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_RESET) += reset.c
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ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_RESET) += reset.c
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smm-$(CONFIG_SOC_AMD_COMMON_BLOCK_PM_CHIPSET_STATE_SAVE) += chipset_state.c
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28
src/soc/amd/common/block/pm/reset.c
Normal file
28
src/soc/amd/common/block/pm/reset.c
Normal file
@@ -0,0 +1,28 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <arch/io.h>
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#include <cf9_reset.h>
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#include <reset.h>
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#include <soc/southbridge.h>
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#include <amdblocks/acpimmio.h>
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#include <amdblocks/reset.h>
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void do_cold_reset(void)
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{
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set_resets_to_cold();
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outb(RST_CPU | SYS_RST, RST_CNT);
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}
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void do_warm_reset(void)
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{
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/* If warm resets are not supported, executed a cold reset */
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if (!CONFIG(SOC_AMD_SUPPORTS_WARM_RESET))
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do_cold_reset(); /* Does not return */
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outb(RST_CPU | SYS_RST, RST_CNT);
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}
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void do_board_reset(void)
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{
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do_cold_reset();
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}
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