tpm: Refactor TPM Kconfig dimensions
Break TPM related Kconfig into the following dimensions: TPM transport support: config CRB_TPM config I2C_TPM config SPI_TPM config MEMORY_MAPPED_TPM (new) TPM brand, not defining any of these is valid, and result in "generic" support: config TPM_ATMEL (new) config TPM_GOOGLE (new) config TPM_GOOGLE_CR50 (new, implies TPM_GOOGLE) config TPM_GOOGLE_TI50 (new to be used later, implies TPM_GOOGLE) What protocol the TPM chip supports: config MAINBOARD_HAS_TPM1 config MAINBOARD_HAS_TPM2 What the user chooses to compile (restricted by the above): config NO_TPM config TPM1 config TPM2 The following Kconfigs will be replaced as indicated: config TPM_CR50 -> TPM_GOOGLE config MAINBOARD_HAS_CRB_TPM -> CRB_TPM config MAINBOARD_HAS_I2C_TPM_ATMEL -> I2C_TPM && TPM_ATMEL config MAINBOARD_HAS_I2C_TPM_CR50 -> I2C_TPM && TPM_GOOGLE config MAINBOARD_HAS_I2C_TPM_GENERIC -> I2C_TPM && !TPM_GOOGLE && !TPM_ATMEL config MAINBOARD_HAS_LPC_TPM -> MEMORY_MAPPED_TPM config MAINBOARD_HAS_SPI_TPM -> SPI_TPM && !TPM_GOOGLE && !TPM_ATMEL config MAINBOARD_HAS_SPI_TPM_CR50 -> SPI_TPM && TPM_GOOGLE Signed-off-by: Jes B. Klinke <jbk@chromium.org> Change-Id: I4656b2b90363b8dfd008dc281ad591862fe2cc9e Reviewed-on: https://review.coreboot.org/c/coreboot/+/63424 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
This commit is contained in:
committed by
Julius Werner
parent
0b71099f65
commit
c6b041a12e
@ -786,7 +786,7 @@ select <symbol> \[if <expr>\]
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config TPM
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bool
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default n
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select LPC_TPM if ARCH_X86
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select MEMORY_MAPPED_TPM if ARCH_X86
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select I2C_TPM if ARCH_ARM
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select I2C_TPM if ARCH_ARM64
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help
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@ -1,17 +1,11 @@
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config CRB_TPM
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bool
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default n
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help
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CRB TPM driver is enabled!
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Mainboard has Command Response Buffer support
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config CRB_TPM_BASE_ADDRESS
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hex
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default 0xfed40000
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help
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Base Address of the CRB TPM Command Structure
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config MAINBOARD_HAS_CRB_TPM
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bool
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default n
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select CRB_TPM
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help
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Mainboard has Command Response Buffer support
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@ -1,5 +1,3 @@
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bootblock-$(CONFIG_CRB_TPM) += tis.c tpm.c
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verstage-$(CONFIG_CRB_TPM) += tis.c tpm.c
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romstage-$(CONFIG_CRB_TPM) += tis.c tpm.c
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ramstage-$(CONFIG_CRB_TPM) += tis.c tpm.c
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postcar-$(CONFIG_CRB_TPM) += tis.c tpm.c
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ifeq ($(CONFIG_CRB_TPM),y)
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all-y += tis.c tpm.c
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endif
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@ -3,27 +3,6 @@ config I2C_TPM
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help
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I2C TPM driver is enabled!
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config MAINBOARD_HAS_I2C_TPM_ATMEL
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bool
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default n
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select I2C_TPM
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help
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Board has an Atmel I2C TPM support
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config MAINBOARD_HAS_I2C_TPM_CR50
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bool
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default n
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select I2C_TPM
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help
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Board has a Cr50 I2C TPM support
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config MAINBOARD_HAS_I2C_TPM_GENERIC
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bool
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default n
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select I2C_TPM
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help
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Board has a generic I2C TPM support
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config MAINBOARD_NEEDS_I2C_TI50_WORKAROUND
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bool
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default n
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@ -36,7 +15,7 @@ config MAINBOARD_NEEDS_I2C_TI50_WORKAROUND
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config DRIVER_TIS_DEFAULT
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bool
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depends on I2C_TPM
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default n if MAINBOARD_HAS_I2C_TPM_ATMEL
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default n if TPM_ATMEL
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default y
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config DRIVER_TPM_I2C_BUS
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@ -58,3 +37,9 @@ config DRIVER_TPM_DISPLAY_TIS_BYTES
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bool "TPM: Display the TIS transactions to I2C TPM chip"
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default n
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depends on I2C_TPM
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config TPM_ATMEL
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bool
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default n
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help
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The mainboard has an Atmel TPM chip.
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@ -1,25 +1,15 @@
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ramstage-$(CONFIG_DRIVER_TIS_DEFAULT) += tis.c
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romstage-$(CONFIG_DRIVER_TIS_DEFAULT) += tis.c
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verstage-$(CONFIG_DRIVER_TIS_DEFAULT) += tis.c
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bootblock-$(CONFIG_DRIVER_TIS_DEFAULT) += tis.c
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postcar-$(CONFIG_DRIVER_TIS_DEFAULT) += tis.c
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ifeq ($(CONFIG_TPM)$(CONFIG_I2C_TPM),yy)
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ramstage-$(CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL) += tis_atmel.c
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romstage-$(CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL) += tis_atmel.c
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verstage-$(CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL) += tis_atmel.c
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bootblock-$(CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL) += tis_atmel.c
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postcar-$(CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL) += tis_atmel.c
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all-$(CONFIG_DRIVER_TIS_DEFAULT) += tis.c
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ramstage-$(CONFIG_MAINBOARD_HAS_I2C_TPM_GENERIC) += tpm.c
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romstage-$(CONFIG_MAINBOARD_HAS_I2C_TPM_GENERIC) += tpm.c
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verstage-$(CONFIG_MAINBOARD_HAS_I2C_TPM_GENERIC) += tpm.c
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bootblock-$(CONFIG_MAINBOARD_HAS_I2C_TPM_GENERIC) += tpm.c
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postcar-$(CONFIG_MAINBOARD_HAS_I2C_TPM_GENERIC) += tpm.c
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ifeq ($(CONFIG_TPM_ATMEL),y)
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all-y += tis_atmel.c
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else ifeq ($(CONFIG_TPM_GOOGLE),y)
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all-y += cr50.c
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else
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all-y += tpm.c
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endif
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ramstage-$(CONFIG_MAINBOARD_HAS_I2C_TPM_CR50) += cr50.c
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romstage-$(CONFIG_MAINBOARD_HAS_I2C_TPM_CR50) += cr50.c
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verstage-$(CONFIG_MAINBOARD_HAS_I2C_TPM_CR50) += cr50.c
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bootblock-$(CONFIG_MAINBOARD_HAS_I2C_TPM_CR50) += cr50.c
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postcar-$(CONFIG_MAINBOARD_HAS_I2C_TPM_CR50) += cr50.c
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endif
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ramstage-$(CONFIG_DRIVER_I2C_TPM_ACPI) += chip.c
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@ -1,10 +1,10 @@
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config MAINBOARD_HAS_LPC_TPM
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config MEMORY_MAPPED_TPM
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bool
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default n
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help
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Board has LPC TPM support
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Board has memory mapped TPM support
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if MAINBOARD_HAS_LPC_TPM
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if MEMORY_MAPPED_TPM
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config TPM_TIS_BASE_ADDRESS
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hex
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@ -1,5 +1,3 @@
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bootblock-$(CONFIG_MAINBOARD_HAS_LPC_TPM) += tis.c
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verstage-$(CONFIG_MAINBOARD_HAS_LPC_TPM) += tis.c
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romstage-$(CONFIG_MAINBOARD_HAS_LPC_TPM) += tis.c
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ramstage-$(CONFIG_MAINBOARD_HAS_LPC_TPM) += tis.c
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postcar-$(CONFIG_MAINBOARD_HAS_LPC_TPM) += tis.c
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ifeq ($(CONFIG_MEMORY_MAPPED_TPM),y)
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all-y += tis.c
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endif
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@ -12,17 +12,3 @@ config DRIVER_TPM_SPI_CHIP
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int "Chip Select of the TPM chip on its SPI bus"
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default 0
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depends on SPI_TPM
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config MAINBOARD_HAS_SPI_TPM_CR50
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bool
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default n
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select MAINBOARD_HAS_SPI_TPM
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help
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Board has a CR50 SPI TPM
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config MAINBOARD_HAS_SPI_TPM
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bool
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default n
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select SPI_TPM
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help
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Board has SPI TPM support
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@ -1,5 +1,3 @@
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bootblock-$(CONFIG_SPI_TPM) += tis.c tpm.c
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verstage-$(CONFIG_SPI_TPM) += tis.c tpm.c
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romstage-$(CONFIG_SPI_TPM) += tis.c tpm.c
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ramstage-$(CONFIG_SPI_TPM) += tis.c tpm.c
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postcar-$(CONFIG_SPI_TPM) += tis.c tpm.c
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ifeq ($(CONFIG_TPM)$(CONFIG_SPI_TPM),yy)
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all-y += tis.c tpm.c
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endif
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@ -104,7 +104,7 @@ static enum cb_err start_transaction(int read_write, size_t bytes, unsigned int
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static int tpm_sync_needed;
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static struct stopwatch wake_up_sw;
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if (CONFIG(TPM_CR50)) {
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if (CONFIG(TPM_GOOGLE)) {
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/*
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* First Cr50 access in each coreboot stage where TPM is used will be
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* prepended by a wake up pulse on the CS line.
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@ -186,7 +186,7 @@ static enum cb_err start_transaction(int read_write, size_t bytes, unsigned int
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*/
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header_resp.body[3] = 0;
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if (CONFIG(TPM_CR50))
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if (CONFIG(TPM_GOOGLE))
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ret = spi_xfer(&spi_slave, header.body, sizeof(header.body), NULL, 0);
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else
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ret = spi_xfer(&spi_slave, header.body, sizeof(header.body),
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@ -497,7 +497,7 @@ int tpm2_init(struct spi_slave *spi_if)
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tpm_info.vendor_id, tpm_info.device_id, tpm_info.revision);
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/* Do some cr50-specific things here. */
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if (CONFIG(TPM_CR50) && tpm_info.vendor_id == 0x1ae0) {
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if (CONFIG(TPM_GOOGLE) && tpm_info.vendor_id == 0x1ae0) {
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struct cr50_firmware_version ver;
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if (tpm_first_access_this_boot()) {
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@ -1,3 +1,5 @@
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ifeq ($(CONFIG_TPM),y)
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ramstage-$(CONFIG_TPM_INIT_RAMSTAGE) += tpm.c
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ifeq ($(CONFIG_TPM_PPI),y)
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@ -6,8 +8,6 @@ else
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ramstage-$(CONFIG_HAVE_ACPI_TABLES) += ppi_stub.c
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endif
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bootblock-$(CONFIG_TPM_CR50) += cr50.c
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verstage-$(CONFIG_TPM_CR50) += cr50.c
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romstage-$(CONFIG_TPM_CR50) += cr50.c
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ramstage-$(CONFIG_TPM_CR50) += cr50.c
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postcar-$(CONFIG_TPM_CR50) += cr50.c
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all-$(CONFIG_TPM_GOOGLE) += cr50.c
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endif
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@ -16,7 +16,7 @@ config BOARD_SPECIFIC_OPTIONS
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select INTEL_GMA_HAVE_VBT
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select INTEL_INT15
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select INTEL_LPSS_UART_FOR_CONSOLE
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select MAINBOARD_HAS_CRB_TPM
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select CRB_TPM
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select MAINBOARD_HAS_LIBGFXINIT
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select MAINBOARD_HAS_TPM2
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select NO_UART_ON_SUPERIO
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@ -11,7 +11,7 @@ config BOARD_SPECIFIC_OPTIONS
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select HAVE_OPTION_TABLE
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select INTEL_GMA_HAVE_VBT
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select MAINBOARD_HAS_LIBGFXINIT
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select MAINBOARD_HAS_LPC_TPM
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select MEMORY_MAPPED_TPM
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select MAINBOARD_USES_IFD_GBE_REGION
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select NORTHBRIDGE_INTEL_HASWELL
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select SERIRQ_CONTINUOUS_MODE
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@ -15,7 +15,7 @@ config BOARD_SPECIFIC_OPTIONS
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select SUPERIO_NUVOTON_NCT6791D
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select REALTEK_8168_RESET
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select RT8168_SET_LED_MODE
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select MAINBOARD_HAS_LPC_TPM
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select MEMORY_MAPPED_TPM
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config DISABLE_HECI1_AT_PRE_BOOT
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default y
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@ -18,7 +18,7 @@ config BOARD_SPECIFIC_OPTIONS
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select SOUTHBRIDGE_AMD_AGESA_YANGTZE
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select DEFAULT_POST_ON_LPC
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select SUPERIO_ITE_IT8623E
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select MAINBOARD_HAS_LPC_TPM
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select MEMORY_MAPPED_TPM
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config MAINBOARD_DIR
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default "asus/am1i-a"
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@ -34,7 +34,7 @@ config BOARD_ASUS_P8H61_M_PRO
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select DRIVERS_ASMEDIA_ASPM_BLACKLIST
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select HAVE_CMOS_DEFAULT
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select HAVE_OPTION_TABLE
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select MAINBOARD_HAS_LPC_TPM
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select MEMORY_MAPPED_TPM
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select REALTEK_8168_RESET
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select RT8168_SET_LED_MODE
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select SUPERIO_NUVOTON_NCT6776
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@ -46,7 +46,7 @@ config BOARD_ASUS_P8H61_M_PRO_CM6630
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select DRIVERS_ASMEDIA_ASPM_BLACKLIST
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select HAVE_CMOS_DEFAULT
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select HAVE_OPTION_TABLE
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select MAINBOARD_HAS_LPC_TPM
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select MEMORY_MAPPED_TPM
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select REALTEK_8168_RESET
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select RT8168_SET_LED_MODE
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select SUPERIO_NUVOTON_NCT6776
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@ -2,7 +2,7 @@ config BOARD_ASUS_P8C_WS
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bool "P8C_WS"
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select BOARD_ASUS_P8X7X_SERIES
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select BOARD_ROMSIZE_KB_8192
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select MAINBOARD_HAS_LPC_TPM
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select MEMORY_MAPPED_TPM
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select SUPERIO_NUVOTON_NCT6776
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select USE_NATIVE_RAMINIT
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@ -18,7 +18,7 @@ config BOARD_ASUS_P8Z77_M_PRO
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select BOARD_ASUS_P8X7X_SERIES
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select BOARD_ROMSIZE_KB_8192
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select DRIVERS_ASMEDIA_ASPM_BLACKLIST # for ASM1061 eSATA
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select MAINBOARD_HAS_LPC_TPM
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select MEMORY_MAPPED_TPM
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select SUPERIO_NUVOTON_NCT6779D
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config BOARD_ASUS_P8Z77_V_LX2
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@ -34,7 +34,7 @@ config BOARD_ASUS_P8Z77_V
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select BOARD_ASUS_P8X7X_SERIES
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select BOARD_ROMSIZE_KB_8192
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select DRIVERS_ASMEDIA_ASPM_BLACKLIST # for ASM1061 eSATA
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select MAINBOARD_HAS_LPC_TPM
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select MEMORY_MAPPED_TPM
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select MAINBOARD_USES_IFD_GBE_REGION
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select SUPERIO_NUVOTON_NCT6779D
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select USE_NATIVE_RAMINIT
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@ -9,7 +9,7 @@ config BOARD_CLEVO_CMLU_COMMON
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select INTEL_GMA_HAVE_VBT
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select INTEL_LPSS_UART_FOR_CONSOLE
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select MAINBOARD_HAS_LIBGFXINIT
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select MAINBOARD_HAS_LPC_TPM
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select MEMORY_MAPPED_TPM
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select MAINBOARD_HAS_TPM2
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select NO_UART_ON_SUPERIO
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select SOC_INTEL_COMETLAKE_1
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@ -10,7 +10,7 @@ config BOARD_CLEVO_KBLU_COMMON
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select INTEL_GMA_HAVE_VBT
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select INTEL_LPSS_UART_FOR_CONSOLE
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select MAINBOARD_HAS_LIBGFXINIT
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select MAINBOARD_HAS_LPC_TPM
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select MEMORY_MAPPED_TPM
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select MAINBOARD_HAS_TPM2
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select NO_UART_ON_SUPERIO
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select SOC_INTEL_COMMON_BLOCK_HDA_VERB
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@ -9,7 +9,7 @@ config BOARD_CLEVO_TGLU_COMMON
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select HAVE_OPTION_TABLE
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select INTEL_GMA_HAVE_VBT
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select INTEL_LPSS_UART_FOR_CONSOLE
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select MAINBOARD_HAS_LPC_TPM
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select MEMORY_MAPPED_TPM
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select MAINBOARD_HAS_TPM2
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select NO_UART_ON_SUPERIO
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select SOC_INTEL_COMMON_BLOCK_HDA_VERB
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@ -7,7 +7,7 @@ config BOARD_DELL_SNB_IVB_WORKSTATIONS
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select NORTHBRIDGE_INTEL_SANDYBRIDGE
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select SERIRQ_CONTINUOUS_MODE
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select USE_NATIVE_RAMINIT
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select MAINBOARD_HAS_LPC_TPM
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select MEMORY_MAPPED_TPM
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select MAINBOARD_HAS_TPM1
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select MAINBOARD_USES_IFD_GBE_REGION
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select SUPERIO_SMSC_SCH5545
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@ -12,7 +12,7 @@ config BOARD_SPECIFIC_OPTIONS
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select BOARD_ROMSIZE_KB_16384 if VBOOT
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select MAINBOARD_HAS_NATIVE_VGA_INIT
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select MAINBOARD_FORCE_NATIVE_VGA_INIT if !CHROMEOS
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select MAINBOARD_HAS_LPC_TPM
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select MEMORY_MAPPED_TPM
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select MAINBOARD_HAS_CHROMEOS
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select SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT
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select BOOT_DEVICE_NOT_SPI_FLASH
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@ -10,7 +10,7 @@ config BOARD_SPECIFIC_OPTIONS
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select HAVE_IFD_BIN
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select HAVE_ME_BIN
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select HAVE_OPTION_TABLE
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select MAINBOARD_HAS_LPC_TPM
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select MEMORY_MAPPED_TPM
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select MAINBOARD_HAS_TPM2
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select SOC_INTEL_BRASWELL
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select SOC_INTEL_COMMON_BLOCK_HDA_VERB
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@ -7,7 +7,7 @@ config BOARD_SPECIFIC_OPTIONS
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select HAVE_ACPI_TABLES
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select HAVE_OPTION_TABLE
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select SOC_INTEL_KABYLAKE
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select MAINBOARD_HAS_LPC_TPM
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select MEMORY_MAPPED_TPM
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select MAINBOARD_HAS_TPM2
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select MAINBOARD_USES_IFD_GBE_REGION
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select INTEL_GMA_HAVE_VBT
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@ -16,7 +16,7 @@ config BOARD_SPECIFIC_OPTIONS
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select HAVE_ACPI_TABLES
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select HAVE_CMOS_DEFAULT
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select HAVE_OPTION_TABLE
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select MAINBOARD_HAS_LPC_TPM
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select MEMORY_MAPPED_TPM
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select INTEL_GMA_HAVE_VBT
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select MAINBOARD_HAS_LIBGFXINIT
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@ -15,7 +15,7 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select INTEL_INT15
|
||||
select SERIRQ_CONTINUOUS_MODE
|
||||
select MAINBOARD_HAS_LIBGFXINIT
|
||||
select MAINBOARD_HAS_LPC_TPM
|
||||
select MEMORY_MAPPED_TPM
|
||||
|
||||
config DRAM_RESET_GATE_GPIO
|
||||
int
|
||||
|
@ -23,7 +23,8 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select EC_GOOGLE_CHROMEEC
|
||||
select EC_GOOGLE_CHROMEEC_BOARDID
|
||||
select EC_GOOGLE_CHROMEEC_SPI
|
||||
select MAINBOARD_HAS_SPI_TPM_CR50 if VBOOT
|
||||
select SPI_TPM if VBOOT
|
||||
select TPM_GOOGLE_CR50 if VBOOT
|
||||
select MAINBOARD_HAS_TPM2 if VBOOT
|
||||
select MAINBOARD_HAS_NATIVE_VGA_INIT
|
||||
select MAINBOARD_FORCE_NATIVE_VGA_INIT
|
||||
|
@ -10,7 +10,7 @@ config BOARD_GOOGLE_BASEBOARD_AURON
|
||||
select INTEL_INT15
|
||||
select MAINBOARD_HAS_CHROMEOS
|
||||
select MAINBOARD_HAS_LIBGFXINIT
|
||||
select MAINBOARD_HAS_LPC_TPM
|
||||
select MEMORY_MAPPED_TPM
|
||||
select MAINBOARD_HAS_TPM1
|
||||
select SOC_INTEL_BROADWELL
|
||||
|
||||
|
@ -8,7 +8,7 @@ config BOARD_GOOGLE_BASEBOARD_BELTINO
|
||||
select INTEL_LYNXPOINT_LP
|
||||
select MAINBOARD_HAS_CHROMEOS
|
||||
select MAINBOARD_HAS_LIBGFXINIT
|
||||
select MAINBOARD_HAS_LPC_TPM
|
||||
select MEMORY_MAPPED_TPM
|
||||
select MAINBOARD_HAS_TPM1
|
||||
select NORTHBRIDGE_INTEL_HASWELL
|
||||
select SOUTHBRIDGE_INTEL_LYNXPOINT
|
||||
|
@ -28,15 +28,16 @@ config BOARD_GOOGLE_BRYA_COMMON
|
||||
select GOOGLE_SMBIOS_MAINBOARD_VERSION
|
||||
select HAVE_ACPI_RESUME
|
||||
select HAVE_ACPI_TABLES
|
||||
select I2C_TPM
|
||||
select INTEL_LPSS_UART_FOR_CONSOLE
|
||||
select MAINBOARD_HAS_CHROMEOS
|
||||
select MAINBOARD_HAS_I2C_TPM_CR50
|
||||
select MAINBOARD_HAS_TPM2
|
||||
select PMC_IPC_ACPI_INTERFACE
|
||||
select SOC_INTEL_COMMON_BLOCK_PCIE_RTD3
|
||||
select SOC_INTEL_CSE_LITE_SKU
|
||||
select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES if SOC_INTEL_ALDERLAKE_PCH_P
|
||||
select SOC_INTEL_COMMON_BASECODE_DEBUG_FEATURE
|
||||
select TPM_GOOGLE_CR50
|
||||
|
||||
config BOARD_GOOGLE_BASEBOARD_BRYA
|
||||
def_bool n
|
||||
|
@ -14,7 +14,7 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select INTEL_INT15
|
||||
select MAINBOARD_HAS_CHROMEOS
|
||||
select MAINBOARD_HAS_LIBGFXINIT
|
||||
select MAINBOARD_HAS_LPC_TPM
|
||||
select MEMORY_MAPPED_TPM
|
||||
select MAINBOARD_HAS_TPM1
|
||||
select NORTHBRIDGE_INTEL_SANDYBRIDGE
|
||||
select SANDYBRIDGE_VBOOT_IN_ROMSTAGE
|
||||
|
@ -24,7 +24,8 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select EC_GOOGLE_CHROMEEC_BOARDID
|
||||
select EC_GOOGLE_CHROMEEC_SKUID
|
||||
select EC_GOOGLE_CHROMEEC_SPI
|
||||
select MAINBOARD_HAS_I2C_TPM_CR50 if VBOOT
|
||||
select I2C_TPM if VBOOT
|
||||
select TPM_GOOGLE_CR50 if VBOOT
|
||||
select MAINBOARD_HAS_TPM2 if VBOOT
|
||||
select MAINBOARD_HAS_NATIVE_VGA_INIT
|
||||
select HAVE_LINEAR_FRAMEBUFFER
|
||||
|
@ -33,7 +33,8 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select EC_GOOGLE_CHROMEEC_BOARDID
|
||||
select EC_GOOGLE_CHROMEEC_SKUID
|
||||
select EC_GOOGLE_CHROMEEC_SPI
|
||||
select MAINBOARD_HAS_SPI_TPM_CR50 if VBOOT
|
||||
select SPI_TPM if VBOOT
|
||||
select TPM_GOOGLE_CR50 if VBOOT
|
||||
select MAINBOARD_HAS_TPM2 if VBOOT
|
||||
select MAINBOARD_HAS_NATIVE_VGA_INIT
|
||||
select HAVE_LINEAR_FRAMEBUFFER
|
||||
|
@ -12,7 +12,7 @@ config BOARD_GOOGLE_BASEBOARD_CYAN
|
||||
select HAVE_SPD_IN_CBFS
|
||||
select INTEL_GMA_HAVE_VBT
|
||||
select MAINBOARD_HAS_CHROMEOS
|
||||
select MAINBOARD_HAS_LPC_TPM
|
||||
select MEMORY_MAPPED_TPM
|
||||
select MAINBOARD_HAS_TPM1
|
||||
select PCIEXP_L1_SUB_STATE if !BOARD_GOOGLE_CYAN
|
||||
select SOC_INTEL_BRASWELL
|
||||
|
@ -15,7 +15,7 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select MAINBOARD_HAS_NATIVE_VGA_INIT
|
||||
select MAINBOARD_FORCE_NATIVE_VGA_INIT
|
||||
select HAVE_LINEAR_FRAMEBUFFER
|
||||
select MAINBOARD_HAS_I2C_TPM_GENERIC
|
||||
select I2C_TPM
|
||||
select MAINBOARD_HAS_TPM1
|
||||
|
||||
config VBOOT
|
||||
|
@ -37,12 +37,13 @@ config BOARD_GOOGLE_BASEBOARD_DEDEDE
|
||||
config BOARD_GOOGLE_BASEBOARD_DEDEDE_CR50
|
||||
def_bool n
|
||||
select CR50_USE_LONG_INTERRUPT_PULSES
|
||||
select MAINBOARD_HAS_SPI_TPM_CR50
|
||||
select SPI_TPM
|
||||
select TPM_GOOGLE_CR50
|
||||
select BOARD_GOOGLE_BASEBOARD_DEDEDE
|
||||
|
||||
config BOARD_GOOGLE_BASEBOARD_DEDEDE_TPM2
|
||||
def_bool n
|
||||
select MAINBOARD_HAS_LPC_TPM
|
||||
select MEMORY_MAPPED_TPM
|
||||
select BOARD_GOOGLE_BASEBOARD_DEDEDE
|
||||
|
||||
if BOARD_GOOGLE_BASEBOARD_DEDEDE
|
||||
|
@ -9,14 +9,15 @@ config BOARD_GOOGLE_BASEBOARD_DELTAUR
|
||||
select EC_GOOGLE_WILCO
|
||||
select HAVE_ACPI_RESUME
|
||||
select HAVE_ACPI_TABLES
|
||||
select I2C_TPM
|
||||
select INTEL_LPSS_UART_FOR_CONSOLE
|
||||
select MAINBOARD_HAS_CHROMEOS
|
||||
select MAINBOARD_HAS_I2C_TPM_CR50
|
||||
select MAINBOARD_HAS_TPM2
|
||||
select MAINBOARD_USES_IFD_EC_REGION
|
||||
select SOC_INTEL_COMMON_BLOCK_HDA_VERB
|
||||
select SOC_INTEL_TIGERLAKE
|
||||
select SYSTEM_TYPE_LAPTOP
|
||||
select TPM_GOOGLE_CR50
|
||||
|
||||
config BOARD_GOOGLE_DELTAN
|
||||
select BOARD_GOOGLE_BASEBOARD_DELTAUR
|
||||
|
@ -12,9 +12,9 @@ config BOARD_GOOGLE_BASEBOARD_DRALLION
|
||||
select HAVE_ACPI_RESUME
|
||||
select HAVE_ACPI_TABLES
|
||||
select HAVE_SPD_IN_CBFS
|
||||
select I2C_TPM
|
||||
select INTEL_LPSS_UART_FOR_CONSOLE
|
||||
select MAINBOARD_HAS_CHROMEOS
|
||||
select MAINBOARD_HAS_I2C_TPM_CR50
|
||||
select MAINBOARD_HAS_TPM2
|
||||
select MAINBOARD_USES_IFD_EC_REGION
|
||||
select SMBIOS_SERIAL_FROM_VPD if VPD
|
||||
@ -22,6 +22,7 @@ config BOARD_GOOGLE_BASEBOARD_DRALLION
|
||||
select SOC_INTEL_COMMON_BLOCK_HDA_VERB
|
||||
select SOC_INTEL_COMMON_BLOCK_SMM_ESPI_DISABLE
|
||||
select SYSTEM_TYPE_LAPTOP
|
||||
select TPM_GOOGLE_CR50
|
||||
|
||||
config BOARD_GOOGLE_DRALLION
|
||||
select BOARD_GOOGLE_BASEBOARD_DRALLION
|
||||
|
@ -14,14 +14,15 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select EC_GOOGLE_CHROMEEC_ESPI
|
||||
select HAVE_ACPI_RESUME
|
||||
select HAVE_ACPI_TABLES
|
||||
select I2C_TPM
|
||||
select INTEL_GMA_HAVE_VBT
|
||||
select INTEL_LPSS_UART_FOR_CONSOLE
|
||||
select MAINBOARD_HAS_CHROMEOS
|
||||
select MAINBOARD_HAS_I2C_TPM_CR50
|
||||
select MAINBOARD_HAS_LIBGFXINIT
|
||||
select MAINBOARD_HAS_TPM2
|
||||
select SOC_INTEL_KABYLAKE
|
||||
select SYSTEM_TYPE_CONVERTIBLE
|
||||
select TPM_GOOGLE_CR50
|
||||
select HAVE_SPD_IN_CBFS
|
||||
|
||||
config DISABLE_HECI1_AT_PRE_BOOT
|
||||
|
@ -14,14 +14,15 @@ config BOARD_GOOGLE_BASEBOARD_FIZZ
|
||||
select INTEL_LPSS_UART_FOR_CONSOLE
|
||||
select MAINBOARD_HAS_CHROMEOS
|
||||
select MAINBOARD_HAS_LIBGFXINIT
|
||||
select MAINBOARD_HAS_SPI_TPM_CR50
|
||||
select MAINBOARD_HAS_TPM2
|
||||
select NO_FADT_8042
|
||||
select SOC_INTEL_KABYLAKE
|
||||
select SPD_READ_BY_WORD
|
||||
select SPI_TPM
|
||||
select RT8168_GET_MAC_FROM_VPD
|
||||
select RT8168_SUPPORT_LEGACY_VPD_MAC
|
||||
select RT8168_SET_LED_MODE
|
||||
select TPM_GOOGLE_CR50
|
||||
|
||||
config BOARD_GOOGLE_FIZZ
|
||||
select BOARD_GOOGLE_BASEBOARD_FIZZ
|
||||
|
@ -11,7 +11,7 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select BOOTROM_SDRAM_INIT # use BootRom to config sdram
|
||||
select COMMON_CBFS_SPI_WRAPPER
|
||||
select SPI_FLASH_WINBOND
|
||||
select MAINBOARD_HAS_I2C_TPM_GENERIC
|
||||
select I2C_TPM
|
||||
select MAINBOARD_HAS_TPM1
|
||||
|
||||
config VBOOT
|
||||
|
@ -15,7 +15,7 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select SPI_FLASH_STMICRO
|
||||
select SPI_FLASH_WINBOND
|
||||
select DRIVERS_UART
|
||||
select MAINBOARD_HAS_I2C_TPM_GENERIC
|
||||
select I2C_TPM
|
||||
select MAINBOARD_HAS_TPM1
|
||||
|
||||
config VBOOT
|
||||
|
@ -16,7 +16,7 @@ config BOARD_GOOGLE_BASEBOARD_GLADOS
|
||||
select INTEL_LPSS_UART_FOR_CONSOLE
|
||||
select MAINBOARD_HAS_CHROMEOS
|
||||
select MAINBOARD_HAS_LIBGFXINIT
|
||||
select MAINBOARD_HAS_LPC_TPM
|
||||
select MEMORY_MAPPED_TPM
|
||||
select MAINBOARD_HAS_TPM1
|
||||
select SOC_INTEL_SKYLAKE
|
||||
select SYSTEM_TYPE_LAPTOP
|
||||
|
@ -43,8 +43,9 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select SPI_FLASH
|
||||
select SPI_FLASH_GIGADEVICE
|
||||
select SPI_FLASH_WINBOND
|
||||
select MAINBOARD_HAS_SPI_TPM_CR50 if GRU_HAS_TPM2
|
||||
select MAINBOARD_HAS_I2C_TPM_GENERIC if !GRU_HAS_TPM2
|
||||
select I2C_TPM if !GRU_HAS_TPM2
|
||||
select TPM_GOOGLE_CR50 if GRU_HAS_TPM2
|
||||
select SPI_TPM if GRU_HAS_TPM2
|
||||
select MAINBOARD_HAS_TPM1 if !GRU_HAS_TPM2
|
||||
select MAINBOARD_HAS_TPM2 if GRU_HAS_TPM2
|
||||
|
||||
|
@ -33,8 +33,8 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select GOOGLE_SMBIOS_MAINBOARD_VERSION
|
||||
select HAVE_EM100_SUPPORT
|
||||
select HAVE_SPD_IN_CBFS
|
||||
select I2C_TPM
|
||||
select MAINBOARD_HAS_CHROMEOS
|
||||
select MAINBOARD_HAS_I2C_TPM_CR50
|
||||
select MAINBOARD_HAS_TPM2
|
||||
select PCIEXP_ASPM
|
||||
select PCIEXP_CLK_PM
|
||||
@ -47,6 +47,7 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select SOC_AMD_COMMON_BLOCK_I2C3_TPM_SHARED_WITH_PSP
|
||||
select SOC_AMD_COMMON_BLOCK_USE_ESPI
|
||||
select SOC_AMD_COMMON_BLOCK_PSP_FUSE_SPL
|
||||
select TPM_GOOGLE_CR50
|
||||
|
||||
config CHROMEOS
|
||||
select EC_GOOGLE_CHROMEEC_SWITCHES
|
||||
|
@ -19,11 +19,12 @@ config BOARD_GOOGLE_HATCH_COMMON
|
||||
select HAVE_ACPI_TABLES
|
||||
select INTEL_LPSS_UART_FOR_CONSOLE
|
||||
select MAINBOARD_HAS_CHROMEOS
|
||||
select MAINBOARD_HAS_SPI_TPM_CR50
|
||||
select MAINBOARD_HAS_TPM2
|
||||
select MB_HAS_ACTIVE_HIGH_SD_PWR_ENABLE
|
||||
select SOC_INTEL_COMETLAKE_1
|
||||
select SOC_INTEL_COMMON_BLOCK_DTT
|
||||
select SPI_TPM
|
||||
select TPM_GOOGLE_CR50
|
||||
|
||||
config BOARD_GOOGLE_BASEBOARD_HATCH
|
||||
def_bool n
|
||||
|
@ -25,9 +25,10 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select SPI_FLASH_GIGADEVICE
|
||||
select SPI_FLASH_MACRONIX
|
||||
select SPI_FLASH_WINBOND
|
||||
select TPM_GOOGLE_CR50 if !BOARD_GOOGLE_SENOR
|
||||
select SPI_TPM if BOARD_GOOGLE_PIGLIN
|
||||
select I2C_TPM if !BOARD_GOOGLE_PIGLIN && !BOARD_GOOGLE_SENOR
|
||||
select MAINBOARD_HAS_CHROMEOS
|
||||
select MAINBOARD_HAS_SPI_TPM_CR50 if BOARD_GOOGLE_PIGLIN
|
||||
select MAINBOARD_HAS_I2C_TPM_CR50 if !BOARD_GOOGLE_PIGLIN && !BOARD_GOOGLE_SENOR
|
||||
select MAINBOARD_HAS_TPM2 if !BOARD_GOOGLE_SENOR
|
||||
|
||||
config VBOOT
|
||||
@ -57,7 +58,7 @@ config MAINBOARD_PART_NUMBER
|
||||
default "Villager" if BOARD_GOOGLE_VILLAGER
|
||||
|
||||
config DRIVER_TPM_I2C_BUS
|
||||
depends on MAINBOARD_HAS_I2C_TPM_CR50
|
||||
depends on I2C_TPM
|
||||
hex
|
||||
default 0xC if BOARD_GOOGLE_HEROBRINE_REV0
|
||||
default 0xE
|
||||
@ -66,7 +67,7 @@ config DRIVER_TPM_I2C_ADDR
|
||||
default 0x50
|
||||
|
||||
config DRIVER_TPM_SPI_BUS
|
||||
depends on MAINBOARD_HAS_SPI_TPM_CR50
|
||||
depends on SPI_TPM
|
||||
hex
|
||||
default 0xE
|
||||
|
||||
|
@ -10,10 +10,10 @@ void bootblock_mainboard_init(void)
|
||||
{
|
||||
setup_chromeos_gpios();
|
||||
|
||||
if (CONFIG(MAINBOARD_HAS_I2C_TPM_CR50))
|
||||
if (CONFIG(I2C_TPM))
|
||||
i2c_init(CONFIG_DRIVER_TPM_I2C_BUS, I2C_SPEED_FAST); /* H1/TPM I2C */
|
||||
|
||||
if (CONFIG(MAINBOARD_HAS_SPI_TPM_CR50))
|
||||
if (CONFIG(SPI_TPM))
|
||||
qup_spi_init(CONFIG_DRIVER_TPM_SPI_BUS, 1010 * KHz); /* H1/TPM SPI */
|
||||
|
||||
if (CONFIG(EC_GOOGLE_CHROMEEC))
|
||||
|
@ -7,7 +7,7 @@ config BOARD_GOOGLE_BASEBOARD_JECHT
|
||||
select INTEL_GMA_HAVE_VBT
|
||||
select MAINBOARD_HAS_CHROMEOS
|
||||
select MAINBOARD_HAS_LIBGFXINIT
|
||||
select MAINBOARD_HAS_LPC_TPM
|
||||
select MEMORY_MAPPED_TPM
|
||||
select MAINBOARD_HAS_TPM1
|
||||
select SOC_INTEL_BROADWELL
|
||||
select SUPERIO_ITE_IT8772F
|
||||
|
@ -15,6 +15,7 @@ config BOARD_GOOGLE_BASEBOARD_KAHLEE
|
||||
select EC_GOOGLE_CHROMEEC_LPC
|
||||
select HAVE_ACPI_TABLES
|
||||
select HAVE_SPD_IN_CBFS
|
||||
select I2C_TPM
|
||||
select GFXUMA
|
||||
select GOOGLE_SMBIOS_MAINBOARD_VERSION
|
||||
select MAINBOARD_HAS_CHROMEOS
|
||||
@ -23,7 +24,6 @@ config BOARD_GOOGLE_BASEBOARD_KAHLEE
|
||||
select SOC_AMD_SMU_FANLESS
|
||||
select HAVE_ACPI_RESUME
|
||||
select DRIVERS_GENERIC_BH720
|
||||
select MAINBOARD_HAS_I2C_TPM_CR50
|
||||
select MAINBOARD_HAS_TPM2
|
||||
select DRIVERS_GENERIC_ADAU7002
|
||||
select DRIVERS_GENERIC_MAX98357A
|
||||
@ -34,6 +34,7 @@ config BOARD_GOOGLE_BASEBOARD_KAHLEE
|
||||
select PCIEXP_L1_SUB_STATE
|
||||
select HAVE_EM100_SUPPORT
|
||||
select SYSTEM_TYPE_LAPTOP
|
||||
select TPM_GOOGLE_CR50
|
||||
|
||||
if BOARD_GOOGLE_BASEBOARD_KAHLEE
|
||||
|
||||
|
@ -31,7 +31,8 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select EC_GOOGLE_CHROMEEC
|
||||
select EC_GOOGLE_CHROMEEC_BOARDID
|
||||
select EC_GOOGLE_CHROMEEC_SPI
|
||||
select MAINBOARD_HAS_SPI_TPM_CR50 if VBOOT
|
||||
select SPI_TPM if VBOOT
|
||||
select TPM_GOOGLE_CR50 if VBOOT
|
||||
select MAINBOARD_HAS_TPM2 if VBOOT
|
||||
select MAINBOARD_HAS_NATIVE_VGA_INIT
|
||||
select MAINBOARD_FORCE_NATIVE_VGA_INIT
|
||||
|
@ -13,7 +13,7 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select HAVE_SPD_IN_CBFS
|
||||
select MAINBOARD_HAS_CHROMEOS
|
||||
select MAINBOARD_HAS_LIBGFXINIT
|
||||
select MAINBOARD_HAS_LPC_TPM
|
||||
select MEMORY_MAPPED_TPM
|
||||
select MAINBOARD_HAS_TPM1
|
||||
select NORTHBRIDGE_INTEL_SANDYBRIDGE
|
||||
select SERIRQ_CONTINUOUS_MODE
|
||||
|
@ -14,7 +14,7 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select SPI_FLASH
|
||||
select SPI_FLASH_GIGADEVICE
|
||||
select SPI_FLASH_WINBOND
|
||||
select MAINBOARD_HAS_I2C_TPM_GENERIC
|
||||
select I2C_TPM
|
||||
select MAINBOARD_HAS_TPM1
|
||||
select DRIVERS_AS3722_RTC
|
||||
|
||||
|
@ -14,7 +14,7 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select SPI_FLASH
|
||||
select SPI_FLASH_GIGADEVICE
|
||||
select SPI_FLASH_WINBOND
|
||||
select MAINBOARD_HAS_I2C_TPM_GENERIC
|
||||
select I2C_TPM
|
||||
select MAINBOARD_HAS_TPM1
|
||||
select DRIVERS_AS3722_RTC
|
||||
|
||||
|
@ -13,7 +13,7 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select DRIVER_PARADE_PS8640
|
||||
select EC_GOOGLE_CHROMEEC
|
||||
select EC_GOOGLE_CHROMEEC_SPI
|
||||
select MAINBOARD_HAS_I2C_TPM_GENERIC
|
||||
select I2C_TPM
|
||||
select MAINBOARD_HAS_TPM1
|
||||
select MAINBOARD_HAS_NATIVE_VGA_INIT
|
||||
select MAINBOARD_FORCE_NATIVE_VGA_INIT
|
||||
|
@ -19,14 +19,15 @@ config BOARD_GOOGLE_BASEBOARD_OCTOPUS
|
||||
select HAVE_ACPI_TABLES
|
||||
select INTEL_LPSS_UART_FOR_CONSOLE
|
||||
select MAINBOARD_HAS_CHROMEOS
|
||||
select MAINBOARD_HAS_SPI_TPM_CR50
|
||||
select MAINBOARD_HAS_TPM2
|
||||
select NO_BOOTBLOCK_CONSOLE
|
||||
select NO_CBFS_MCACHE
|
||||
select NO_FMAP_CACHE
|
||||
select SOC_ESPI
|
||||
select SOC_INTEL_GEMINILAKE
|
||||
select SPI_TPM
|
||||
select SYSTEM_TYPE_LAPTOP
|
||||
select TPM_GOOGLE_CR50
|
||||
|
||||
config BOARD_GOOGLE_AMPTON
|
||||
select BOARD_GOOGLE_BASEBOARD_OCTOPUS
|
||||
|
@ -14,7 +14,7 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select INTEL_INT15
|
||||
select MAINBOARD_HAS_CHROMEOS
|
||||
select MAINBOARD_HAS_LIBGFXINIT
|
||||
select MAINBOARD_HAS_LPC_TPM
|
||||
select MEMORY_MAPPED_TPM
|
||||
select MAINBOARD_HAS_TPM1
|
||||
select NORTHBRIDGE_INTEL_SANDYBRIDGE
|
||||
select SANDYBRIDGE_VBOOT_IN_ROMSTAGE
|
||||
|
@ -12,7 +12,7 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select MAINBOARD_FORCE_NATIVE_VGA_INIT
|
||||
select HAVE_LINEAR_FRAMEBUFFER
|
||||
select DRIVER_PARADE_PS8625
|
||||
select MAINBOARD_HAS_I2C_TPM_GENERIC
|
||||
select I2C_TPM
|
||||
select MAINBOARD_HAS_TPM1
|
||||
select MISSING_BOARD_RESET
|
||||
|
||||
|
@ -14,6 +14,7 @@ config BOARD_GOOGLE_BASEBOARD_POPPY
|
||||
select MAINBOARD_HAS_CHROMEOS
|
||||
select MAINBOARD_HAS_TPM2
|
||||
select SOC_INTEL_KABYLAKE
|
||||
select TPM_GOOGLE_CR50
|
||||
|
||||
config BOARD_GOOGLE_ATLAS
|
||||
select BOARD_GOOGLE_BASEBOARD_POPPY
|
||||
@ -26,14 +27,14 @@ config BOARD_GOOGLE_ATLAS
|
||||
select GEO_SAR_ENABLE if CHROMEOS_WIFI_SAR
|
||||
select INTEL_GMA_HAVE_VBT
|
||||
select MAINBOARD_HAS_LIBGFXINIT
|
||||
select MAINBOARD_HAS_SPI_TPM_CR50
|
||||
select SPI_TPM
|
||||
select SYSTEM_TYPE_LAPTOP
|
||||
select VARIANT_HAS_CAMERA_ACPI
|
||||
|
||||
config BOARD_GOOGLE_POPPY
|
||||
select BOARD_GOOGLE_BASEBOARD_POPPY
|
||||
select DRIVERS_I2C_MAX98927
|
||||
select MAINBOARD_HAS_I2C_TPM_CR50
|
||||
select I2C_TPM
|
||||
select NO_FADT_8042
|
||||
select SYSTEM_TYPE_LAPTOP
|
||||
select VARIANT_HAS_CAMERA_ACPI
|
||||
@ -46,7 +47,7 @@ config BOARD_GOOGLE_NAMI
|
||||
select DRIVERS_SPI_ACPI
|
||||
select EXCLUDE_NATIVE_SD_INTERFACE
|
||||
select INTEL_GMA_HAVE_VBT
|
||||
select MAINBOARD_HAS_SPI_TPM_CR50
|
||||
select SPI_TPM
|
||||
select SYSTEM_TYPE_LAPTOP
|
||||
|
||||
config BOARD_GOOGLE_NAUTILUS
|
||||
@ -54,8 +55,8 @@ config BOARD_GOOGLE_NAUTILUS
|
||||
select CHROMEOS_WIFI_SAR if CHROMEOS
|
||||
select DRIVERS_GENERIC_MAX98357A
|
||||
select DRIVERS_I2C_DA7219
|
||||
select I2C_TPM
|
||||
select INTEL_GMA_HAVE_VBT
|
||||
select MAINBOARD_HAS_I2C_TPM_CR50
|
||||
select SYSTEM_TYPE_CONVERTIBLE
|
||||
select VARIANT_HAS_CAMERA_ACPI
|
||||
|
||||
@ -70,8 +71,8 @@ config BOARD_GOOGLE_NOCTURNE
|
||||
select EXCLUDE_NATIVE_SD_INTERFACE
|
||||
select GEO_SAR_ENABLE if CHROMEOS_WIFI_SAR
|
||||
select INTEL_GMA_HAVE_VBT
|
||||
select MAINBOARD_HAS_SPI_TPM_CR50
|
||||
select NO_FADT_8042
|
||||
select SPI_TPM
|
||||
select SYSTEM_TYPE_DETACHABLE
|
||||
select VARIANT_HAS_CAMERA_ACPI
|
||||
|
||||
@ -84,14 +85,14 @@ config BOARD_GOOGLE_RAMMUS
|
||||
select DRIVERS_USB_ACPI
|
||||
select INTEL_GMA_HAVE_VBT
|
||||
select MAINBOARD_HAS_LIBGFXINIT
|
||||
select MAINBOARD_HAS_SPI_TPM_CR50
|
||||
select SPI_TPM
|
||||
select SYSTEM_TYPE_LAPTOP
|
||||
|
||||
config BOARD_GOOGLE_SORAKA
|
||||
select BOARD_GOOGLE_BASEBOARD_POPPY
|
||||
select DRIVERS_I2C_MAX98927
|
||||
select I2C_TPM
|
||||
select INTEL_GMA_HAVE_VBT
|
||||
select MAINBOARD_HAS_I2C_TPM_CR50
|
||||
select NO_FADT_8042
|
||||
select SYSTEM_TYPE_DETACHABLE
|
||||
select VARIANT_HAS_CAMERA_ACPI
|
||||
@ -118,15 +119,15 @@ config DEVICETREE
|
||||
default "variants/baseboard/devicetree.cb"
|
||||
|
||||
config DRIVER_TPM_I2C_BUS
|
||||
depends on MAINBOARD_HAS_I2C_TPM_CR50
|
||||
depends on I2C_TPM
|
||||
default 0x1
|
||||
|
||||
config DRIVER_TPM_I2C_ADDR
|
||||
depends on MAINBOARD_HAS_I2C_TPM_CR50
|
||||
depends on I2C_TPM
|
||||
default 0x50
|
||||
|
||||
config DRIVER_TPM_SPI_BUS
|
||||
depends on MAINBOARD_HAS_SPI_TPM_CR50
|
||||
depends on SPI_TPM
|
||||
default 0x1
|
||||
|
||||
config INCLUDE_NHLT_BLOBS
|
||||
|
@ -9,7 +9,7 @@ config BOARD_GOOGLE_BASEBOARD_RAMBI
|
||||
select HAVE_OPTION_TABLE
|
||||
select HAVE_SPD_IN_CBFS
|
||||
select MAINBOARD_HAS_CHROMEOS
|
||||
select MAINBOARD_HAS_LPC_TPM
|
||||
select MEMORY_MAPPED_TPM
|
||||
select MAINBOARD_HAS_TPM1
|
||||
select SOC_INTEL_BAYTRAIL
|
||||
|
||||
|
@ -12,14 +12,15 @@ config BOARD_GOOGLE_BASEBOARD_REEF
|
||||
select GOOGLE_SMBIOS_MAINBOARD_VERSION
|
||||
select HAVE_ACPI_RESUME
|
||||
select HAVE_ACPI_TABLES
|
||||
select I2C_TPM
|
||||
select INTEL_GMA_HAVE_VBT
|
||||
select INTEL_LPSS_UART_FOR_CONSOLE
|
||||
select MAINBOARD_HAS_CHROMEOS
|
||||
select MAINBOARD_HAS_I2C_TPM_CR50
|
||||
select MAINBOARD_HAS_TPM2
|
||||
select SAR_ENABLE
|
||||
select SOC_INTEL_APOLLOLAKE
|
||||
select SYSTEM_TYPE_LAPTOP
|
||||
select TPM_GOOGLE_CR50
|
||||
select USE_SAR
|
||||
|
||||
config BOARD_GOOGLE_REEF
|
||||
|
@ -10,10 +10,10 @@ config BOARD_GOOGLE_BASEBOARD_SARIEN
|
||||
select GOOGLE_SMBIOS_MAINBOARD_VERSION
|
||||
select HAVE_ACPI_RESUME
|
||||
select HAVE_ACPI_TABLES
|
||||
select I2C_TPM
|
||||
select INTEL_GMA_HAVE_VBT
|
||||
select INTEL_LPSS_UART_FOR_CONSOLE
|
||||
select MAINBOARD_HAS_CHROMEOS
|
||||
select MAINBOARD_HAS_I2C_TPM_CR50
|
||||
select MAINBOARD_HAS_TPM2
|
||||
select MAINBOARD_USES_IFD_EC_REGION
|
||||
select SAR_ENABLE
|
||||
@ -22,6 +22,7 @@ config BOARD_GOOGLE_BASEBOARD_SARIEN
|
||||
select SOC_INTEL_COMMON_BLOCK_SMM_ESPI_DISABLE
|
||||
select SOC_INTEL_WHISKEYLAKE
|
||||
select SPD_READ_BY_WORD
|
||||
select TPM_GOOGLE_CR50
|
||||
select USE_SAR
|
||||
|
||||
config BOARD_GOOGLE_ARCADA
|
||||
|
@ -24,12 +24,13 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select ELOG
|
||||
select ELOG_GSMI
|
||||
select FW_CONFIG
|
||||
select I2C_TPM
|
||||
select MAINBOARD_HAS_CHROMEOS
|
||||
select MAINBOARD_HAS_I2C_TPM_CR50
|
||||
select MAINBOARD_HAS_TPM2
|
||||
select PSP_DISABLE_POSTCODES # TODO re-enable PSP postcodes later (b/227199049)
|
||||
select SOC_AMD_SABRINA
|
||||
select SOC_AMD_COMMON_BLOCK_USE_ESPI
|
||||
select TPM_GOOGLE_CR50
|
||||
|
||||
config CHROMEOS
|
||||
select EC_GOOGLE_CHROMEEC_SWITCHES
|
||||
|
@ -12,7 +12,7 @@ config BOARD_GOOGLE_BASEBOARD_SLIPPY
|
||||
select INTEL_LYNXPOINT_LP
|
||||
select MAINBOARD_HAS_CHROMEOS
|
||||
select MAINBOARD_HAS_LIBGFXINIT
|
||||
select MAINBOARD_HAS_LPC_TPM
|
||||
select MEMORY_MAPPED_TPM
|
||||
select MAINBOARD_HAS_TPM1
|
||||
select NORTHBRIDGE_INTEL_HASWELL
|
||||
select SOUTHBRIDGE_INTEL_LYNXPOINT
|
||||
|
@ -9,6 +9,7 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select EC_GOOGLE_CHROMEEC
|
||||
select EC_GOOGLE_CHROMEEC_I2C
|
||||
select EC_GOOGLE_CHROMEEC_I2C_PROTO3
|
||||
select I2C_TPM
|
||||
select MAINBOARD_HAS_NATIVE_VGA_INIT
|
||||
select MAINBOARD_FORCE_NATIVE_VGA_INIT
|
||||
select SPI_FLASH
|
||||
@ -16,7 +17,6 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select SOC_NVIDIA_TEGRA210
|
||||
select MAINBOARD_DO_DSI_INIT
|
||||
select MAINBOARD_HAS_CHROMEOS
|
||||
select MAINBOARD_HAS_I2C_TPM_GENERIC
|
||||
select MAINBOARD_HAS_TPM1
|
||||
select DRIVERS_TI_TPS65913_RTC
|
||||
|
||||
|
@ -13,7 +13,7 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select SPI_FLASH_SPANSION
|
||||
select SPI_FLASH_STMICRO
|
||||
select DRIVERS_UART
|
||||
select MAINBOARD_HAS_I2C_TPM_GENERIC
|
||||
select I2C_TPM
|
||||
select MAINBOARD_HAS_TPM1
|
||||
|
||||
config VBOOT
|
||||
|
@ -14,7 +14,7 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select INTEL_INT15
|
||||
select MAINBOARD_HAS_CHROMEOS
|
||||
select MAINBOARD_HAS_LIBGFXINIT
|
||||
select MAINBOARD_HAS_LPC_TPM
|
||||
select MEMORY_MAPPED_TPM
|
||||
select MAINBOARD_HAS_TPM1
|
||||
select NORTHBRIDGE_INTEL_SANDYBRIDGE
|
||||
select SANDYBRIDGE_VBOOT_IN_ROMSTAGE
|
||||
|
@ -44,8 +44,9 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select SPI_FLASH_GIGADEVICE
|
||||
select SPI_FLASH_WINBOND
|
||||
select MAINBOARD_HAS_CHROMEOS
|
||||
select MAINBOARD_HAS_SPI_TPM_CR50 if !BOARD_GOOGLE_BUBS
|
||||
select MAINBOARD_HAS_TPM2 if !BOARD_GOOGLE_BUBS
|
||||
select SPI_TPM if !BOARD_GOOGLE_BUBS
|
||||
select TPM_GOOGLE_CR50 if !BOARD_GOOGLE_BUBS
|
||||
|
||||
config VBOOT
|
||||
select EC_GOOGLE_CHROMEEC_SWITCHES if !BOARD_GOOGLE_BUBS
|
||||
|
@ -26,7 +26,7 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select SPI_FLASH
|
||||
select SPI_FLASH_GIGADEVICE
|
||||
select SPI_FLASH_WINBOND
|
||||
select MAINBOARD_HAS_I2C_TPM_GENERIC
|
||||
select I2C_TPM
|
||||
select MAINBOARD_HAS_TPM1
|
||||
|
||||
config VBOOT
|
||||
|
@ -11,7 +11,7 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select SPI_FLASH
|
||||
select SPI_FLASH_GIGADEVICE
|
||||
select SPI_FLASH_WINBOND
|
||||
select MAINBOARD_HAS_I2C_TPM_GENERIC
|
||||
select I2C_TPM
|
||||
select MAINBOARD_HAS_TPM1
|
||||
|
||||
config VBOOT
|
||||
|
@ -11,7 +11,7 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select SPI_FLASH
|
||||
select SPI_FLASH_GIGADEVICE
|
||||
select SPI_FLASH_WINBOND
|
||||
select MAINBOARD_HAS_I2C_TPM_GENERIC
|
||||
select I2C_TPM
|
||||
select MAINBOARD_HAS_TPM1
|
||||
|
||||
config VBOOT
|
||||
|
@ -29,12 +29,14 @@ config BOARD_GOOGLE_BASEBOARD_VOLTEER
|
||||
select HAVE_SPD_IN_CBFS
|
||||
select INTEL_LPSS_UART_FOR_CONSOLE
|
||||
select MAINBOARD_HAS_CHROMEOS
|
||||
select MAINBOARD_HAS_I2C_TPM_CR50 if BOARD_GOOGLE_VOLTEER2_TI50
|
||||
select MAINBOARD_HAS_SPI_TPM_CR50 if !BOARD_GOOGLE_VOLTEER2_TI50
|
||||
select I2C_TPM if BOARD_GOOGLE_VOLTEER2_TI50
|
||||
select SPI_TPM if !BOARD_GOOGLE_VOLTEER2_TI50
|
||||
select MAINBOARD_HAS_TPM2
|
||||
select SOC_INTEL_COMMON_BLOCK_TCSS
|
||||
select SOC_INTEL_CSE_LITE_SKU
|
||||
select SOC_INTEL_TIGERLAKE
|
||||
select TPM_GOOGLE_TI50 if BOARD_GOOGLE_VOLTEER2_TI50
|
||||
select TPM_GOOGLE_CR50 if !BOARD_GOOGLE_VOLTEER2_TI50
|
||||
|
||||
config BOARD_GOOGLE_DELBIN
|
||||
select BOARD_GOOGLE_BASEBOARD_VOLTEER
|
||||
|
@ -84,7 +84,7 @@ static void mainboard_enable(struct device *dev)
|
||||
void mainboard_update_soc_chip_config(struct soc_intel_tigerlake_config *cfg)
|
||||
{
|
||||
int ret;
|
||||
if (!CONFIG(MAINBOARD_HAS_SPI_TPM_CR50)) {
|
||||
if (!CONFIG(TPM_GOOGLE_CR50) || !CONFIG(SPI_TPM)) {
|
||||
/*
|
||||
* Negotiation of long interrupt pulses is only supported via SPI. I2C is only
|
||||
* used on reworked prototypes on which the TPM is replaced with Dauntless under
|
||||
|
@ -29,7 +29,7 @@ chip soc/intel/tigerlake
|
||||
register "common_soc_config" = "{
|
||||
.gspi[0] = {
|
||||
.speed_mhz = 1,
|
||||
.early_init = CONFIG(MAINBOARD_HAS_SPI_TPM_CR50),
|
||||
.early_init = CONFIG(SPI_TPM),
|
||||
},
|
||||
.i2c[0] = {
|
||||
.speed = I2C_SPEED_FAST,
|
||||
|
@ -22,14 +22,14 @@ chip soc/intel/tigerlake
|
||||
register "common_soc_config" = "{
|
||||
.gspi[0] = {
|
||||
.speed_mhz = 1,
|
||||
.early_init = CONFIG(MAINBOARD_HAS_SPI_TPM_CR50),
|
||||
.early_init = CONFIG(SPI_TPM),
|
||||
},
|
||||
.i2c[0] = {
|
||||
.speed = I2C_SPEED_FAST,
|
||||
},
|
||||
.i2c[1] = {
|
||||
.speed = I2C_SPEED_FAST,
|
||||
.early_init = CONFIG(MAINBOARD_HAS_I2C_TPM_CR50),
|
||||
.early_init = CONFIG(I2C_TPM),
|
||||
},
|
||||
.i2c[2] = {
|
||||
.speed = I2C_SPEED_FAST,
|
||||
|
@ -20,6 +20,6 @@ static void devtree_enable_i2c_tpm(void)
|
||||
|
||||
void variant_devtree_update(void)
|
||||
{
|
||||
if (CONFIG(MAINBOARD_HAS_I2C_TPM_CR50))
|
||||
if (CONFIG(I2C_TPM))
|
||||
devtree_enable_i2c_tpm();
|
||||
}
|
||||
|
@ -37,7 +37,8 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select GOOGLE_SMBIOS_MAINBOARD_VERSION
|
||||
select MAINBOARD_HAS_CHROMEOS
|
||||
select AMD_SOC_CONSOLE_UART
|
||||
select MAINBOARD_HAS_I2C_TPM_CR50
|
||||
select I2C_TPM
|
||||
select TPM_GOOGLE_CR50
|
||||
select MAINBOARD_HAS_TPM2
|
||||
select PCIEXP_ASPM
|
||||
select PCIEXP_CLK_PM
|
||||
|
@ -10,7 +10,7 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select SERIRQ_CONTINUOUS_MODE
|
||||
select SOUTHBRIDGE_INTEL_BD82X6X
|
||||
select USE_NATIVE_RAMINIT
|
||||
select MAINBOARD_HAS_LPC_TPM
|
||||
select MEMORY_MAPPED_TPM
|
||||
select MAINBOARD_HAS_TPM1
|
||||
select HAVE_OPTION_TABLE
|
||||
select HAVE_CMOS_DEFAULT
|
||||
|
@ -11,7 +11,7 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select INTEL_GMA_HAVE_VBT
|
||||
select INTEL_LYNXPOINT_LP
|
||||
select MAINBOARD_HAS_LIBGFXINIT
|
||||
select MAINBOARD_HAS_LPC_TPM
|
||||
select MEMORY_MAPPED_TPM
|
||||
select MAINBOARD_HAS_TPM1
|
||||
select MAINBOARD_USES_IFD_GBE_REGION
|
||||
select NORTHBRIDGE_INTEL_HASWELL
|
||||
|
@ -7,7 +7,7 @@ config BOARD_HP_SNB_IVB_LAPTOPS_COMMON
|
||||
select HAVE_ACPI_TABLES
|
||||
select HAVE_CMOS_DEFAULT
|
||||
select HAVE_OPTION_TABLE
|
||||
select MAINBOARD_HAS_LPC_TPM
|
||||
select MEMORY_MAPPED_TPM
|
||||
select MAINBOARD_HAS_TPM1
|
||||
select NORTHBRIDGE_INTEL_SANDYBRIDGE
|
||||
select SERIRQ_CONTINUOUS_MODE
|
||||
@ -86,7 +86,7 @@ config BOARD_HP_PROBOOK_6360B
|
||||
select INTEL_GMA_HAVE_VBT
|
||||
select INTEL_INT15
|
||||
select MAINBOARD_HAS_LIBGFXINIT
|
||||
select MAINBOARD_HAS_LPC_TPM
|
||||
select MEMORY_MAPPED_TPM
|
||||
select MAINBOARD_HAS_TPM1
|
||||
select MAINBOARD_USES_IFD_GBE_REGION
|
||||
select SOUTHBRIDGE_INTEL_BD82X6X
|
||||
|
@ -8,7 +8,7 @@ config BOARD_HP_Z220_SERIES_COMMON
|
||||
select SERIRQ_CONTINUOUS_MODE
|
||||
select SOUTHBRIDGE_INTEL_BD82X6X
|
||||
select USE_NATIVE_RAMINIT
|
||||
select MAINBOARD_HAS_LPC_TPM
|
||||
select MEMORY_MAPPED_TPM
|
||||
select MAINBOARD_HAS_TPM1
|
||||
select HAVE_OPTION_TABLE
|
||||
select HAVE_CMOS_DEFAULT
|
||||
|
@ -53,10 +53,10 @@ config BOARD_INTEL_ADLRVP_M_EXT_EC
|
||||
select FW_CONFIG
|
||||
select FW_CONFIG_SOURCE_CHROMEEC_CBI
|
||||
select INTEL_LPSS_UART_FOR_CONSOLE
|
||||
select MAINBOARD_HAS_SPI_TPM_CR50
|
||||
select MAINBOARD_HAS_TPM2
|
||||
select SOC_INTEL_ALDERLAKE_PCH_M
|
||||
select SPI_TPM
|
||||
select TPM_GOOGLE_CR50
|
||||
|
||||
config BOARD_INTEL_ADLRVP_N
|
||||
select BOARD_INTEL_ADLRVP_COMMON
|
||||
|
@ -9,7 +9,7 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select HAVE_OPTION_TABLE
|
||||
select HAVE_ACPI_RESUME
|
||||
select MAINBOARD_HAS_CHROMEOS
|
||||
select MAINBOARD_HAS_LPC_TPM
|
||||
select MEMORY_MAPPED_TPM
|
||||
select INTEL_INT15
|
||||
|
||||
config VBOOT
|
||||
|
@ -9,7 +9,7 @@ config BOARD_INTEL_COFFEELAKE_RVP_COMMON
|
||||
select HAVE_ACPI_TABLES
|
||||
select INTEL_LPSS_UART_FOR_CONSOLE
|
||||
select MAINBOARD_HAS_CHROMEOS
|
||||
select MAINBOARD_HAS_LPC_TPM
|
||||
select MEMORY_MAPPED_TPM
|
||||
select MAINBOARD_USES_IFD_EC_REGION
|
||||
|
||||
config BOARD_INTEL_COFFEELAKE_RVP8
|
||||
|
@ -8,7 +8,8 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select ENABLE_BUILTIN_HSUART1
|
||||
select HAVE_ACPI_TABLES
|
||||
select SOC_INTEL_QUARK
|
||||
select MAINBOARD_HAS_I2C_TPM_ATMEL
|
||||
select I2C_TPM
|
||||
select TPM_ATMEL
|
||||
select MAINBOARD_HAS_TPM2
|
||||
select UDK_2017_BINDING
|
||||
|
||||
|
@ -8,7 +8,7 @@ config BOARD_INTEL_BASEBOARD_GLKRVP
|
||||
select HAVE_ACPI_TABLES
|
||||
select INTEL_LPSS_UART_FOR_CONSOLE
|
||||
select MAINBOARD_HAS_CHROMEOS
|
||||
select MAINBOARD_HAS_LPC_TPM
|
||||
select MEMORY_MAPPED_TPM
|
||||
select DRIVERS_GENERIC_MAX98357A
|
||||
select DRIVERS_I2C_DA7219
|
||||
select SOC_ESPI
|
||||
|
@ -8,7 +8,7 @@ config BOARD_INTEL_KBLRVP_COMMON
|
||||
select HAVE_SPD_IN_CBFS
|
||||
select INTEL_LPSS_UART_FOR_CONSOLE
|
||||
select MAINBOARD_HAS_CHROMEOS
|
||||
select MAINBOARD_HAS_LPC_TPM
|
||||
select MEMORY_MAPPED_TPM
|
||||
select SOC_INTEL_KABYLAKE
|
||||
|
||||
config BOARD_INTEL_KBLRVP3
|
||||
|
@ -17,7 +17,7 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select HAVE_OPTION_TABLE
|
||||
select INTEL_LPSS_UART_FOR_CONSOLE
|
||||
select MAINBOARD_HAS_CHROMEOS
|
||||
select MAINBOARD_HAS_LPC_TPM
|
||||
select MEMORY_MAPPED_TPM
|
||||
select SOC_INTEL_SKYLAKE
|
||||
select HAVE_SPD_IN_CBFS
|
||||
|
||||
|
@ -20,11 +20,12 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select HAVE_SPD_IN_CBFS
|
||||
select INTEL_LPSS_UART_FOR_CONSOLE
|
||||
select MAINBOARD_HAS_CHROMEOS
|
||||
select MAINBOARD_HAS_SPI_TPM_CR50
|
||||
select MAINBOARD_HAS_TPM2
|
||||
select PCIEXP_HOTPLUG
|
||||
select SOC_INTEL_ALDERLAKE_PCH_P
|
||||
select SOC_INTEL_CSE_LITE_SKU
|
||||
select SPI_TPM
|
||||
select TPM_GOOGLE_CR50
|
||||
select INTEL_CAR_NEM #TODO - Enable INTEL_CAR_NEM_ENHANCED
|
||||
|
||||
config CHROMEOS
|
||||
|
@ -13,7 +13,7 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select HAVE_ACPI_TABLES
|
||||
select HAVE_OPTION_TABLE
|
||||
select MAINBOARD_HAS_CHROMEOS
|
||||
select MAINBOARD_HAS_LPC_TPM
|
||||
select MEMORY_MAPPED_TPM
|
||||
select SOC_INTEL_BRASWELL
|
||||
select PCIEXP_L1_SUB_STATE
|
||||
|
||||
|
@ -21,9 +21,9 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select HAVE_SPD_IN_CBFS
|
||||
select SOC_INTEL_CSE_LITE_SKU
|
||||
select MAINBOARD_HAS_TPM2
|
||||
select MAINBOARD_HAS_SPI_TPM_CR50
|
||||
select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES
|
||||
select SPI_TPM
|
||||
select TPM_GOOGLE_CR50
|
||||
|
||||
config CHROMEOS
|
||||
select EC_GOOGLE_CHROMEEC_SWITCHES if TGL_CHROME_EC
|
||||
|
@ -8,7 +8,7 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select HAVE_OPTION_TABLE
|
||||
select HAVE_ACPI_RESUME
|
||||
select MAINBOARD_HAS_CHROMEOS
|
||||
select MAINBOARD_HAS_LPC_TPM
|
||||
select MEMORY_MAPPED_TPM
|
||||
select INTEL_INT15
|
||||
|
||||
config VBOOT
|
||||
|
@ -10,7 +10,7 @@ config BOARD_KONTRON_BSL6_COMMON
|
||||
select HAVE_ACPI_TABLES
|
||||
select HAVE_OPTION_TABLE
|
||||
select HAVE_CMOS_DEFAULT
|
||||
select MAINBOARD_HAS_LPC_TPM
|
||||
select MEMORY_MAPPED_TPM
|
||||
select EC_KONTRON_KEMPLD
|
||||
select MAINBOARD_HAS_LIBGFXINIT
|
||||
select DRIVERS_I2C_NCT7802Y
|
||||
|
@ -10,7 +10,7 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select HAVE_CMOS_DEFAULT
|
||||
select HAVE_OPTION_TABLE
|
||||
select INTEL_GMA_HAVE_VBT
|
||||
select MAINBOARD_HAS_CRB_TPM
|
||||
select CRB_TPM
|
||||
select MAINBOARD_HAS_LIBGFXINIT
|
||||
select ONBOARD_VGA_IS_PRIMARY
|
||||
select SOC_INTEL_APOLLOLAKE
|
||||
|
@ -16,7 +16,7 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select MAINBOARD_HAS_LIBGFXINIT
|
||||
select GFX_GMA_PANEL_1_ON_LVDS
|
||||
select SERIRQ_CONTINUOUS_MODE
|
||||
select MAINBOARD_HAS_LPC_TPM
|
||||
select MEMORY_MAPPED_TPM
|
||||
select MAINBOARD_HAS_TPM1
|
||||
select HAVE_SPD_IN_CBFS
|
||||
|
||||
|
@ -15,7 +15,7 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select INTEL_INT15
|
||||
select HAVE_ACPI_RESUME
|
||||
select DRIVERS_LENOVO_WACOM
|
||||
select MAINBOARD_HAS_LPC_TPM
|
||||
select MEMORY_MAPPED_TPM
|
||||
select MAINBOARD_HAS_TPM1
|
||||
select DRIVERS_LENOVO_HYBRID_GRAPHICS
|
||||
select INTEL_GMA_HAVE_VBT
|
||||
|
@ -17,7 +17,7 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select HAVE_ACPI_RESUME
|
||||
select INTEL_INT15
|
||||
select DRIVERS_RICOH_RCE822
|
||||
select MAINBOARD_HAS_LPC_TPM
|
||||
select MEMORY_MAPPED_TPM
|
||||
select MAINBOARD_HAS_TPM1
|
||||
select MAINBOARD_HAS_LIBGFXINIT
|
||||
select GFX_GMA_PANEL_1_ON_LVDS
|
||||
|
@ -16,7 +16,7 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select HAVE_CMOS_DEFAULT
|
||||
select HAVE_ACPI_RESUME
|
||||
select INTEL_INT15
|
||||
select MAINBOARD_HAS_LPC_TPM
|
||||
select MEMORY_MAPPED_TPM
|
||||
select MAINBOARD_HAS_TPM1
|
||||
select MAINBOARD_HAS_LIBGFXINIT
|
||||
select GFX_GMA_PANEL_1_ON_LVDS
|
||||
|
@ -12,7 +12,7 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select HAVE_ACPI_TABLES
|
||||
select HAVE_OPTION_TABLE
|
||||
select HAVE_CMOS_DEFAULT
|
||||
select MAINBOARD_HAS_LPC_TPM
|
||||
select MEMORY_MAPPED_TPM
|
||||
select MAINBOARD_HAS_TPM1
|
||||
select INTEL_INT15
|
||||
select NORTHBRIDGE_INTEL_SANDYBRIDGE
|
||||
|
@ -17,7 +17,7 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select HAVE_CMOS_DEFAULT
|
||||
select HAVE_ACPI_RESUME
|
||||
select INTEL_INT15
|
||||
select MAINBOARD_HAS_LPC_TPM
|
||||
select MEMORY_MAPPED_TPM
|
||||
select MAINBOARD_HAS_TPM1
|
||||
select MAINBOARD_HAS_LIBGFXINIT
|
||||
select GFX_GMA_PANEL_1_ON_LVDS if BOARD_LENOVO_T430S
|
||||
|
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user