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soc/intel/alderlake: Add Raptor Lake System Agent Device IDs

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Add System Agent IDs for Raptor Lake SKUs based on RPL Datasheet
(Doc ID: 743844) & EDS Vol 1 (Doc ID: 640555).

Signed-off-by: Lean Sheng Tan <sheng.tan@9elements.com>
Change-Id: I805040c65852742f1bbc43b443e115bcb0a930aa
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81115
Reviewed-by: Jan Samek <jan.samek@siemens.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Lean Sheng Tan
2024-03-07 17:46:25 +01:00
committed by Martin L Roth
parent 255f927515
commit c8d47169f4
7 changed files with 35 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
src/include/device/pci_ids.h
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@@ -4285,6 +4285,9 @@
#define PCI_DID_INTEL_RPL_P_ID_3 0xa708
#define PCI_DID_INTEL_RPL_P_ID_4 0xa71b
#define PCI_DID_INTEL_RPL_P_ID_5 0xa71c
#define PCI_DID_INTEL_RPL_P_ID_6 0xa709
#define PCI_DID_INTEL_RPL_P_ID_7 0xa70a
#define PCI_DID_INTEL_RPL_P_ID_8 0xa716
#define PCI_DID_INTEL_LNL_M_ID 0x6400
/* Intel SMBUS device Ids */

13
src/soc/intel/alderlake/bootblock/report_platform.c
View File

@@ -84,11 +84,14 @@ static struct {
{ PCI_DID_INTEL_RPL_HX_ID_6, "Raptorlake-HX (8+8)" },
{ PCI_DID_INTEL_RPL_HX_ID_7, "Raptorlake-HX (6+8)" },
{ PCI_DID_INTEL_RPL_HX_ID_8, "Raptorlake-HX (6+4)" },
{ PCI_DID_INTEL_RPL_P_ID_1, "Raptorlake-P" },
{ PCI_DID_INTEL_RPL_P_ID_2, "Raptorlake-P" },
{ PCI_DID_INTEL_RPL_P_ID_3, "Raptorlake-P" },
{ PCI_DID_INTEL_RPL_P_ID_4, "Raptorlake-P" },
{ PCI_DID_INTEL_RPL_P_ID_5, "Raptorlake-P" },
{ PCI_DID_INTEL_RPL_P_ID_1, "Raptorlake-P/H/H Refresh (6+8)" },
{ PCI_DID_INTEL_RPL_P_ID_2, "Raptorlake-P/H/H Refresh (4+8)" },
{ PCI_DID_INTEL_RPL_P_ID_3, "Raptorlake-U/U Refresh (2+8)" },
{ PCI_DID_INTEL_RPL_P_ID_4, "Raptorlake-U/U Refresh (2+4)" },
{ PCI_DID_INTEL_RPL_P_ID_5, "Raptorlake-U (1+4)" },
{ PCI_DID_INTEL_RPL_P_ID_6, "Raptorlake-PX (6+8)" },
{ PCI_DID_INTEL_RPL_P_ID_7, "Raptorlake-PX (4+8)" },
{ PCI_DID_INTEL_RPL_P_ID_8, "Raptorlake-H (4+4)" },
{ PCI_DID_INTEL_RPL_S_ID_1, "Raptorlake-S (8+16)" },
{ PCI_DID_INTEL_RPL_S_ID_2, "Raptorlake-S (8+0)" },
{ PCI_DID_INTEL_RPL_S_ID_3, "Raptorlake-S (8+8)" },

3
src/soc/intel/alderlake/chip.h
View File

@@ -176,6 +176,9 @@ static const struct {
{ PCI_DID_INTEL_RPL_P_ID_3, RPL_P_282_242_142_15W_CORE, TDP_15W },
{ PCI_DID_INTEL_RPL_P_ID_4, RPL_P_282_242_142_15W_CORE, TDP_15W },
{ PCI_DID_INTEL_RPL_P_ID_5, RPL_P_282_242_142_15W_CORE, TDP_15W },
{ PCI_DID_INTEL_RPL_P_ID_6, RPL_P_682_642_482_45W_CORE, TDP_45W },
{ PCI_DID_INTEL_RPL_P_ID_7, RPL_P_682_642_482_45W_CORE, TDP_45W },
{ PCI_DID_INTEL_RPL_P_ID_8, RPL_P_682_642_482_45W_CORE, TDP_45W },
{ PCI_DID_INTEL_RPL_S_ID_1, RPL_S_8161_35W_CORE, TDP_35W },
{ PCI_DID_INTEL_RPL_S_ID_1, RPL_S_8161_65W_CORE, TDP_65W },
{ PCI_DID_INTEL_RPL_S_ID_1, RPL_S_8161_95W_CORE, TDP_95W },

3
src/soc/intel/alderlake/cpu.c
View File

@@ -268,6 +268,9 @@ enum adl_cpu_type get_adl_cpu_type(void)
PCI_DID_INTEL_RPL_P_ID_3,
PCI_DID_INTEL_RPL_P_ID_4,
PCI_DID_INTEL_RPL_P_ID_5,
PCI_DID_INTEL_RPL_P_ID_6,
PCI_DID_INTEL_RPL_P_ID_7,
PCI_DID_INTEL_RPL_P_ID_8,
};
const uint16_t mchid = pci_s_read_config16(PCI_DEV(0, PCI_SLOT(SA_DEVFN_ROOT),

3
src/soc/intel/alderlake/fsp_params.c
View File

@@ -528,6 +528,9 @@ static uint16_t get_vccin_aux_imon_iccmax(void)
case PCI_DID_INTEL_RPL_P_ID_3:
case PCI_DID_INTEL_RPL_P_ID_4:
case PCI_DID_INTEL_RPL_P_ID_5:
case PCI_DID_INTEL_RPL_P_ID_6:
case PCI_DID_INTEL_RPL_P_ID_7:
case PCI_DID_INTEL_RPL_P_ID_8:
tdp = get_cpu_tdp();
if (tdp == TDP_45W)
return ICC_MAX_TDP_45W;

12
src/soc/intel/alderlake/vr_config.c
View File

@@ -134,6 +134,9 @@ static const struct vr_lookup vr_config_ll[] = {
{ PCI_DID_INTEL_RPL_P_ID_3, 15, VR_CFG_ALL_DOMAINS_LOADLINE(2.8, 3.2) },
{ PCI_DID_INTEL_RPL_P_ID_4, 15, VR_CFG_ALL_DOMAINS_LOADLINE(2.8, 3.2) },
{ PCI_DID_INTEL_RPL_P_ID_5, 15, VR_CFG_ALL_DOMAINS_LOADLINE(2.8, 3.2) },
{ PCI_DID_INTEL_RPL_P_ID_6, 45, VR_CFG_ALL_DOMAINS_LOADLINE(2.3, 3.2) },
{ PCI_DID_INTEL_RPL_P_ID_7, 45, VR_CFG_ALL_DOMAINS_LOADLINE(2.3, 3.2) },
{ PCI_DID_INTEL_RPL_P_ID_8, 45, VR_CFG_ALL_DOMAINS_LOADLINE(2.3, 3.2) },
{ PCI_DID_INTEL_ADL_S_ID_1, 150, VR_CFG_ALL_DOMAINS_LOADLINE(1.1, 4.0) },
{ PCI_DID_INTEL_ADL_S_ID_1, 125, VR_CFG_ALL_DOMAINS_LOADLINE(1.1, 4.0) },
{ PCI_DID_INTEL_ADL_S_ID_1, 65, VR_CFG_ALL_DOMAINS_LOADLINE(1.1, 4.0) },
@@ -195,6 +198,9 @@ static const struct vr_lookup vr_config_icc[] = {
{ PCI_DID_INTEL_RPL_P_ID_3, 15, VR_CFG_ALL_DOMAINS_ICC(80, 40) },
{ PCI_DID_INTEL_RPL_P_ID_4, 15, VR_CFG_ALL_DOMAINS_ICC(80, 40) },
{ PCI_DID_INTEL_RPL_P_ID_5, 15, VR_CFG_ALL_DOMAINS_ICC(80, 40) },
{ PCI_DID_INTEL_RPL_P_ID_6, 45, VR_CFG_ALL_DOMAINS_ICC(160, 55) },
{ PCI_DID_INTEL_RPL_P_ID_7, 45, VR_CFG_ALL_DOMAINS_ICC(160, 55) },
{ PCI_DID_INTEL_RPL_P_ID_8, 45, VR_CFG_ALL_DOMAINS_ICC(160, 55) },
{ PCI_DID_INTEL_ADL_S_ID_1, 150, VR_CFG_ALL_DOMAINS_ICC(280, 30) },
{ PCI_DID_INTEL_ADL_S_ID_1, 125, VR_CFG_ALL_DOMAINS_ICC(280, 30) },
{ PCI_DID_INTEL_ADL_S_ID_1, 65, VR_CFG_ALL_DOMAINS_ICC(240, 30) },
@@ -256,6 +262,9 @@ static const struct vr_lookup vr_config_tdc_timewindow[] = {
{ PCI_DID_INTEL_RPL_P_ID_3, 15, VR_CFG_ALL_DOMAINS_TDC(28000, 28000) },
{ PCI_DID_INTEL_RPL_P_ID_4, 15, VR_CFG_ALL_DOMAINS_TDC(28000, 28000) },
{ PCI_DID_INTEL_RPL_P_ID_5, 15, VR_CFG_ALL_DOMAINS_TDC(28000, 28000) },
{ PCI_DID_INTEL_RPL_P_ID_6, 45, VR_CFG_ALL_DOMAINS_TDC(28000, 28000) },
{ PCI_DID_INTEL_RPL_P_ID_7, 45, VR_CFG_ALL_DOMAINS_TDC(28000, 28000) },
{ PCI_DID_INTEL_RPL_P_ID_8, 45, VR_CFG_ALL_DOMAINS_TDC(28000, 28000) },
{ PCI_DID_INTEL_ADL_S_ID_1, 150, VR_CFG_ALL_DOMAINS_TDC(56000, 56000) },
{ PCI_DID_INTEL_ADL_S_ID_1, 125, VR_CFG_ALL_DOMAINS_TDC(56000, 56000) },
{ PCI_DID_INTEL_ADL_S_ID_1, 65, VR_CFG_ALL_DOMAINS_TDC(56000, 56000) },
@@ -317,6 +326,9 @@ static const struct vr_lookup vr_config_tdc_currentlimit[] = {
{ PCI_DID_INTEL_RPL_P_ID_3, 15, VR_CFG_ALL_DOMAINS_TDC_CURRENT(22, 22) },
{ PCI_DID_INTEL_RPL_P_ID_4, 15, VR_CFG_ALL_DOMAINS_TDC_CURRENT(22, 22) },
{ PCI_DID_INTEL_RPL_P_ID_5, 15, VR_CFG_ALL_DOMAINS_TDC_CURRENT(22, 22) },
{ PCI_DID_INTEL_RPL_P_ID_6, 45, VR_CFG_ALL_DOMAINS_TDC_CURRENT(86, 86) },
{ PCI_DID_INTEL_RPL_P_ID_7, 45, VR_CFG_ALL_DOMAINS_TDC_CURRENT(86, 86) },
{ PCI_DID_INTEL_RPL_P_ID_8, 45, VR_CFG_ALL_DOMAINS_TDC_CURRENT(86, 86) },
{ PCI_DID_INTEL_ADL_S_ID_1, 150, VR_CFG_ALL_DOMAINS_TDC_CURRENT(132, 22) },
{ PCI_DID_INTEL_ADL_S_ID_1, 125, VR_CFG_ALL_DOMAINS_TDC_CURRENT(132, 22) },
{ PCI_DID_INTEL_ADL_S_ID_1, 65, VR_CFG_ALL_DOMAINS_TDC_CURRENT(89, 22) },

3
src/soc/intel/common/block/systemagent/systemagent.c
View File

@@ -535,6 +535,9 @@ static const unsigned short systemagent_ids[] = {
PCI_DID_INTEL_RPL_P_ID_3,
PCI_DID_INTEL_RPL_P_ID_4,
PCI_DID_INTEL_RPL_P_ID_5,
PCI_DID_INTEL_RPL_P_ID_6,
PCI_DID_INTEL_RPL_P_ID_7,
PCI_DID_INTEL_RPL_P_ID_8,
0
};