intel/fsp2_0: Move temporary RAM to .bss with FSP_USES_CB_STACK

The documentation for StackBase and StackSize in FSPM_ARCH_UPD is
confusing. Previously the region was shared for heap and stack,
starting with FSP2.1 only for heap (or 'temporary RAM') for HOBs.

Moving the allocation outside DCACHE_BSP_STACK_SIZE allows use of
stack guards and reduces amount of reserved CAR for bootblock and
verstage, as the new allocation in .bss is only taken in romstage.

BUG=b:140268415

Change-Id: I4cffcc73a89cb97ab7759dd373196ce9753a6307
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35233
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>

src/drivers/intel/fsp2_0/Kconfig

@@ -152,6 +152,11 @@ config FSP_USES_CB_STACK
 	  without reinitializing stack pointer. This feature is
 	  supported Icelake onwards.
 
+config FSP_TEMP_RAM_SIZE
+	hex
+	default 0x10000
+	depends on FSP_USES_CB_STACK
+
 config VERIFY_HOBS
 	bool "Verify the FSP hand-off-blocks"
 	default n