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soc/intel/denverton_ns: Rework acpi/cpu.asl

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Use acpigen_write_processor_cnot to implement notifications to the CPU.

Change-Id: If482c64e7133cc6d82472d121ac138fc1b60a183
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/29892
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: David Guckian
This commit is contained in:
Arthur Heymans
2018-11-28 12:27:03 +01:00
committed by Duncan Laurie
parent 0ac555e8fb
commit c9c5e84d6f
2 changed files with 14 additions and 112 deletions
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6
src/soc/intel/denverton_ns/acpi.c
View File

@ -253,6 +253,12 @@ void generate_cpu_entries(struct device *device)
acpigen_pop_len();
}
/* PPKG is usually used for thermal management
of the first and only package. */
acpigen_write_processor_package("PPKG", 0, num_cpus);
/* Add a method to notify processor nodes */
acpigen_write_processor_cnot(num_cpus);
}
unsigned long acpi_madt_irq_overrides(unsigned long current)

120
src/soc/intel/denverton_ns/acpi/cpu.asl
View File

@ -15,127 +15,23 @@
*
*/
/* These devices are created at runtime */
External (\_PR.CP00, DeviceObj)
External (\_PR.CP01, DeviceObj)
External (\_PR.CP02, DeviceObj)
External (\_PR.CP03, DeviceObj)
External (\_PR.CP04, DeviceObj)
External (\_PR.CP05, DeviceObj)
External (\_PR.CP06, DeviceObj)
External (\_PR.CP07, DeviceObj)
External (\_PR.CP08, DeviceObj)
External (\_PR.CP09, DeviceObj)
External (\_PR.CP10, DeviceObj)
External (\_PR.CP11, DeviceObj)
External (\_PR.CP12, DeviceObj)
External (\_PR.CP13, DeviceObj)
External (\_PR.CP14, DeviceObj)
External (\_PR.CP15, DeviceObj)
/* These come from the dynamically created CPU SSDT */
External (\_PR.CNOT, MethodObj)
/* Notify OS to re-read CPU tables, assuming ^2 CPU count */
/* Notify OS to re-read CPU tables */
Method (PNOT)
{
If (LGreaterEqual (\PCNT, 2)) {
Notify (\_PR.CP00, 0x81) // _CST
Notify (\_PR.CP01, 0x81) // _CST
}
If (LGreaterEqual (\PCNT, 4)) {
Notify (\_PR.CP02, 0x81) // _CST
Notify (\_PR.CP03, 0x81) // _CST
}
If (LGreaterEqual (\PCNT, 8)) {
Notify (\_PR.CP04, 0x81) // _CST
Notify (\_PR.CP05, 0x81) // _CST
Notify (\_PR.CP06, 0x81) // _CST
Notify (\_PR.CP07, 0x81) // _CST
}
If (LGreaterEqual (\PCNT, 16)) {
Notify (\_PR.CP08, 0x81) // _CST
Notify (\_PR.CP09, 0x81) // _CST
Notify (\_PR.CP10, 0x81) // _CST
Notify (\_PR.CP11, 0x81) // _CST
Notify (\_PR.CP12, 0x81) // _CST
Notify (\_PR.CP13, 0x81) // _CST
Notify (\_PR.CP14, 0x81) // _CST
Notify (\_PR.CP15, 0x81) // _CST
}
\_PR.CNOT (0x81)
}
/* Notify OS to re-read CPU _PPC limit, assuming ^2 CPU count */
/* Notify OS to re-read CPU _PPC limit */
Method (PPCN)
{
If (LGreaterEqual (\PCNT, 2)) {
Notify (\_PR.CP00, 0x80) // _PPC
Notify (\_PR.CP01, 0x80) // _PPC
}
If (LGreaterEqual (\PCNT, 4)) {
Notify (\_PR.CP02, 0x80) // _PPC
Notify (\_PR.CP03, 0x80) // _PPC
}
If (LGreaterEqual (\PCNT, 8)) {
Notify (\_PR.CP04, 0x80) // _PPC
Notify (\_PR.CP05, 0x80) // _PPC
Notify (\_PR.CP06, 0x80) // _PPC
Notify (\_PR.CP07, 0x80) // _PPC
}
If (LGreaterEqual (\PCNT, 16)) {
Notify (\_PR.CP08, 0x80) // _PPC
Notify (\_PR.CP09, 0x80) // _PPC
Notify (\_PR.CP10, 0x80) // _PPC
Notify (\_PR.CP11, 0x80) // _PPC
Notify (\_PR.CP12, 0x80) // _PPC
Notify (\_PR.CP13, 0x80) // _PPC
Notify (\_PR.CP14, 0x80) // _PPC
Notify (\_PR.CP15, 0x80) // _PPC
}
\_PR.CNOT (0x80)
}
/* Notify OS to re-read Throttle Limit tables, assuming ^2 CPU count */
/* Notify OS to re-read Throttle Limit tables */
Method (TNOT)
{
If (LGreaterEqual (\PCNT, 2)) {
Notify (\_PR.CP00, 0x82) // _TPC
Notify (\_PR.CP01, 0x82) // _TPC
}
If (LGreaterEqual (\PCNT, 4)) {
Notify (\_PR.CP02, 0x82) // _TPC
Notify (\_PR.CP03, 0x82) // _TPC
}
If (LGreaterEqual (\PCNT, 8)) {
Notify (\_PR.CP04, 0x82) // _TPC
Notify (\_PR.CP05, 0x82) // _TPC
Notify (\_PR.CP06, 0x82) // _TPC
Notify (\_PR.CP07, 0x82) // _TPC
}
If (LGreaterEqual (\PCNT, 16)) {
Notify (\_PR.CP08, 0x82) // _TPC
Notify (\_PR.CP09, 0x82) // _TPC
Notify (\_PR.CP10, 0x82) // _TPC
Notify (\_PR.CP11, 0x82) // _TPC
Notify (\_PR.CP12, 0x82) // _TPC
Notify (\_PR.CP13, 0x82) // _TPC
Notify (\_PR.CP14, 0x82) // _TPC
Notify (\_PR.CP15, 0x82) // _TPC
}
}
/* Return a package containing enabled processor entries */
Method (PPKG)
{
If (LGreaterEqual (\PCNT, 16)) {
Return (Package() {\_PR.CP00, \_PR.CP01, \_PR.CP02, \_PR.CP03,
\_PR.CP04, \_PR.CP05, \_PR.CP06, \_PR.CP07,
\_PR.CP08, \_PR.CP09, \_PR.CP10, \_PR.CP11,
\_PR.CP12, \_PR.CP13, \_PR.CP14, \_PR.CP15})
} ElseIf (LGreaterEqual (\PCNT, 8)) {
Return (Package() {\_PR.CP00, \_PR.CP01, \_PR.CP02, \_PR.CP03,
\_PR.CP04, \_PR.CP05, \_PR.CP06, \_PR.CP07})
} ElseIf (LGreaterEqual (\PCNT, 4)) {
Return (Package() {\_PR.CP00, \_PR.CP01, \_PR.CP02, \_PR.CP03})
} ElseIf (LGreaterEqual (\PCNT, 2)) {
Return (Package() {\_PR.CP00, \_PR.CP01})
} Else {
Return (Package() {\_PR.CP00})
}
\_PR.CNOT (0x82)
}