mb/**/hda_verb: Use AZALIA_PIN_CFG_NC(0)
Replace `0x411111f0` with `AZALIA_PIN_CFG_NC(0)`, which evaluates to the same value and conveys additional information to the reader. Done with a bulk search and replace operation. Change-Id: Ibd84daec017bc1ab1ee4edd906fda80231c134cc Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82394 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
This commit is contained in:
@@ -11,19 +11,19 @@ const u32 cim_verb_data[] = {
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/* Pin Widget Verb Table */
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AZALIA_PIN_CFG(0, 0x11, 0x014b7140),
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AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
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AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_CFG_NC(0)),
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AZALIA_PIN_CFG(0, 0x14, 0x01014010),
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AZALIA_PIN_CFG(0, 0x15, 0x01011012),
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AZALIA_PIN_CFG(0, 0x16, 0x01016011),
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AZALIA_PIN_CFG(0, 0x17, 0x01012014),
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AZALIA_PIN_CFG(0, 0x18, 0x01a19850),
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AZALIA_PIN_CFG(0, 0x19, 0x02a19851),
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AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
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AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
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AZALIA_PIN_CFG(0, 0x1b, 0x0221401f),
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AZALIA_PIN_CFG(0, 0x1c, 0x0181305f),
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AZALIA_PIN_CFG(0, 0x1d, 0x411111f0),
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AZALIA_PIN_CFG(0, 0x1d, AZALIA_PIN_CFG_NC(0)),
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AZALIA_PIN_CFG(0, 0x1e, 0x18567130),
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AZALIA_PIN_CFG(0, 0x1f, 0x411111f0),
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AZALIA_PIN_CFG(0, 0x1f, AZALIA_PIN_CFG_NC(0)),
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/* HDMI */
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0x80862803,
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@@ -14,18 +14,18 @@ const u32 cim_verb_data[] = {
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AZALIA_PIN_CFG(0, 0x12, 0xb7a60140), // Pin widget 0x12 - DMIC
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AZALIA_PIN_CFG(0, 0x13, 0x40000000), // Pin widget 0x13 - DMIC
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AZALIA_PIN_CFG(0, 0x14, 0x90170110), // Pin widget 0x14 - FRONT (Port-D)
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AZALIA_PIN_CFG(0, 0x15, 0x411111f0), // Pin widget 0x15 - I2S-OUT
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AZALIA_PIN_CFG(0, 0x16, 0x411111f0), // Pin widget 0x16 - LINE3 (Port-B)
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AZALIA_PIN_CFG(0, 0x17, 0x411111f0), // Pin widget 0x17 - I2S-OUT
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AZALIA_PIN_CFG(0, 0x18, 0x411111f0), // Pin widget 0x18 - I2S-IN
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AZALIA_PIN_CFG(0, 0x19, 0x411111f0), // Pin widget 0x19 - MIC2 (Port-F)
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AZALIA_PIN_CFG(0, 0x1a, 0x411111f0), // Pin widget 0x1A - LINE1 (Port-C)
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AZALIA_PIN_CFG(0, 0x15, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x15 - I2S-OUT
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AZALIA_PIN_CFG(0, 0x16, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x16 - LINE3 (Port-B)
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AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x17 - I2S-OUT
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AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x18 - I2S-IN
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AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x19 - MIC2 (Port-F)
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AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x1A - LINE1 (Port-C)
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AZALIA_PIN_CFG(0, 0x1b, 0x04a11050), // Pin widget 0x1B - LINE2 (Port-E)
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AZALIA_PIN_CFG(0, 0x1d, 0x40600001), // Pin widget 0x1D - PC-BEEP
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AZALIA_PIN_CFG(0, 0x1e, 0x04451130), // Pin widget 0x1E - S/PDIF-OUT
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AZALIA_PIN_CFG(0, 0x1f, 0x411111f0), // Pin widget 0x1F - S/PDIF-IN
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AZALIA_PIN_CFG(0, 0x1f, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x1F - S/PDIF-IN
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AZALIA_PIN_CFG(0, 0x21, 0x04211020), // Pin widget 0x21 - HP-OUT (Port-I)
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AZALIA_PIN_CFG(0, 0x29, 0x411111f0), // Pin widget 0x29 - I2S-IN
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AZALIA_PIN_CFG(0, 0x29, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x29 - I2S-IN
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0x02050038, 0x02047901, 0x0205006b, 0x02040260, // NID 0x20 -0 Set Class-D output
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// power as 2.2W@4 Ohm, and
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// MIC2-VREFO-R is controlled by
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@@ -46,14 +46,14 @@ const u32 cim_verb_data[] = {
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AZALIA_PIN_CFG(0, 0x12, 0xb7a60140), // Pin widget 0x12 - DMIC
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AZALIA_PIN_CFG(0, 0x13, 0x40000000), // Pin widget 0x13 - DMIC
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AZALIA_PIN_CFG(0, 0x14, 0x90170110), // Pin widget 0x14 - Front (Port-D)
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AZALIA_PIN_CFG(0, 0x16, 0x411111f0), // Pin widget 0x16 - NPC
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AZALIA_PIN_CFG(0, 0x17, 0x411111f0), // Pin widget 0x17 - I2S OUT
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AZALIA_PIN_CFG(0, 0x18, 0x411111f0), // Pin widget 0x18 - I2S IN
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AZALIA_PIN_CFG(0, 0x19, 0x411111f0), // Pin widget 0x19 - MIC2 (Port-F)
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AZALIA_PIN_CFG(0, 0x1a, 0x411111f0), // Pin widget 0x1A - NPC
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AZALIA_PIN_CFG(0, 0x16, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x16 - NPC
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AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x17 - I2S OUT
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AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x18 - I2S IN
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AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x19 - MIC2 (Port-F)
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AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x1A - NPC
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AZALIA_PIN_CFG(0, 0x1b, 0x04a19030), // Pin widget 0x1B - LINE2 (Port-E)
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AZALIA_PIN_CFG(0, 0x1d, 0x4066192d), // Pin widget 0x1D - BEEP-IN
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AZALIA_PIN_CFG(0, 0x1e, 0x411111f0), // Pin widget 0x1E - S/PDIF-OUT
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AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x1E - S/PDIF-OUT
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AZALIA_PIN_CFG(0, 0x21, 0x04211020), // Pin widget 0x21 - HP1-OUT (Port-I)
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0x05c50011, 0x05c40003, 0x05c50011, 0x05c40003, // dis. Silence detect delay turn off
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0x0205003c, 0x0204f254, 0x0205003c, 0x0204f214, // Class-D power on reset
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@@ -14,18 +14,18 @@ const u32 cim_verb_data[] = {
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AZALIA_PIN_CFG(0, 0x12, 0xb7a60140), // Pin widget 0x12 - DMIC
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AZALIA_PIN_CFG(0, 0x13, 0x40000000), // Pin widget 0x13 - DMIC
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AZALIA_PIN_CFG(0, 0x14, 0x90170110), // Pin widget 0x14 - FRONT (Port-D)
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AZALIA_PIN_CFG(0, 0x15, 0x411111f0), // Pin widget 0x15 - I2S-OUT
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AZALIA_PIN_CFG(0, 0x16, 0x411111f0), // Pin widget 0x16 - LINE3 (Port-B)
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AZALIA_PIN_CFG(0, 0x17, 0x411111f0), // Pin widget 0x17 - I2S-OUT
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AZALIA_PIN_CFG(0, 0x18, 0x411111f0), // Pin widget 0x18 - I2S-IN
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AZALIA_PIN_CFG(0, 0x19, 0x411111f0), // Pin widget 0x19 - MIC2 (Port-F)
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AZALIA_PIN_CFG(0, 0x1a, 0x411111f0), // Pin widget 0x1A - LINE1 (Port-C)
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AZALIA_PIN_CFG(0, 0x15, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x15 - I2S-OUT
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AZALIA_PIN_CFG(0, 0x16, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x16 - LINE3 (Port-B)
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AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x17 - I2S-OUT
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AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x18 - I2S-IN
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AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x19 - MIC2 (Port-F)
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AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x1A - LINE1 (Port-C)
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AZALIA_PIN_CFG(0, 0x1b, 0x04a11050), // Pin widget 0x1B - LINE2 (Port-E)
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AZALIA_PIN_CFG(0, 0x1d, 0x40600001), // Pin widget 0x1D - PC-BEEP
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AZALIA_PIN_CFG(0, 0x1e, 0x04451130), // Pin widget 0x1E - S/PDIF-OUT
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AZALIA_PIN_CFG(0, 0x1f, 0x411111f0), // Pin widget 0x1F - S/PDIF-IN
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AZALIA_PIN_CFG(0, 0x1f, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x1F - S/PDIF-IN
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AZALIA_PIN_CFG(0, 0x21, 0x04211020), // Pin widget 0x21 - HP-OUT (Port-I)
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AZALIA_PIN_CFG(0, 0x29, 0x411111f0), // Pin widget 0x29 - I2S-IN
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AZALIA_PIN_CFG(0, 0x29, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x29 - I2S-IN
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0x02050038, 0x02047901, 0x0205006b, 0x02040260, // NID 0x20 -0 Set Class-D output
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// power as 2.2W@4 Ohm, and
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// MIC2-VREFO-R is controlled by
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@@ -46,14 +46,14 @@ const u32 cim_verb_data[] = {
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AZALIA_PIN_CFG(0, 0x12, 0xb7a60140), // Pin widget 0x12 - DMIC
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AZALIA_PIN_CFG(0, 0x13, 0x40000000), // Pin widget 0x13 - DMIC
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AZALIA_PIN_CFG(0, 0x14, 0x90170110), // Pin widget 0x14 - Front (Port-D)
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AZALIA_PIN_CFG(0, 0x16, 0x411111f0), // Pin widget 0x16 - NPC
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AZALIA_PIN_CFG(0, 0x17, 0x411111f0), // Pin widget 0x17 - I2S OUT
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AZALIA_PIN_CFG(0, 0x18, 0x411111f0), // Pin widget 0x18 - I2S IN
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AZALIA_PIN_CFG(0, 0x19, 0x411111f0), // Pin widget 0x19 - MIC2 (Port-F)
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AZALIA_PIN_CFG(0, 0x1a, 0x411111f0), // Pin widget 0x1A - NPC
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AZALIA_PIN_CFG(0, 0x16, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x16 - NPC
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AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x17 - I2S OUT
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AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x18 - I2S IN
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AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x19 - MIC2 (Port-F)
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AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x1A - NPC
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AZALIA_PIN_CFG(0, 0x1b, 0x04a19030), // Pin widget 0x1B - LINE2 (Port-E)
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AZALIA_PIN_CFG(0, 0x1d, 0x4066192d), // Pin widget 0x1D - BEEP-IN
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AZALIA_PIN_CFG(0, 0x1e, 0x411111f0), // Pin widget 0x1E - S/PDIF-OUT
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AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x1E - S/PDIF-OUT
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AZALIA_PIN_CFG(0, 0x21, 0x04211020), // Pin widget 0x21 - HP1-OUT (Port-I)
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0x05c50011, 0x05c40003, 0x05c50011, 0x05c40003, // dis. Silence detect delay turn off
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0x0205003c, 0x0204f254, 0x0205003c, 0x0204f214, // Class-D power on reset
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@@ -12,8 +12,8 @@ const u32 cim_verb_data[] = {
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/* Pin Widget Verb Table */
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AZALIA_PIN_CFG(0, 0x14, 0x01014010),
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AZALIA_PIN_CFG(0, 0x15, 0x411111f0),
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AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
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AZALIA_PIN_CFG(0, 0x15, AZALIA_PIN_CFG_NC(0)),
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AZALIA_PIN_CFG(0, 0x16, AZALIA_PIN_CFG_NC(0)),
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AZALIA_PIN_CFG(0, 0x18, 0x01a19840),
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AZALIA_PIN_CFG(0, 0x19, 0x02a19c50),
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AZALIA_PIN_CFG(0, 0x1a, 0x0181304f),
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@@ -7,20 +7,20 @@ const u32 cim_verb_data[] = {
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0x18498892, /* Subsystem ID */
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15, /* Number of 4 dword sets */
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AZALIA_SUBVENDOR(0, 0x18498892),
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AZALIA_PIN_CFG(0, 0x11, 0x411111f0),
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AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
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AZALIA_PIN_CFG(0, 0x11, AZALIA_PIN_CFG_NC(0)),
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AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_CFG_NC(0)),
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AZALIA_PIN_CFG(0, 0x14, 0x01014010),
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AZALIA_PIN_CFG(0, 0x15, 0x01011012),
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AZALIA_PIN_CFG(0, 0x16, 0x01016011),
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AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
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AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
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AZALIA_PIN_CFG(0, 0x18, 0x01a19840),
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AZALIA_PIN_CFG(0, 0x19, 0x02a19850),
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AZALIA_PIN_CFG(0, 0x1a, 0x0181304f),
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AZALIA_PIN_CFG(0, 0x1b, 0x02214020),
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AZALIA_PIN_CFG(0, 0x1c, 0x411111f0),
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AZALIA_PIN_CFG(0, 0x1c, AZALIA_PIN_CFG_NC(0)),
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AZALIA_PIN_CFG(0, 0x1d, 0x4005e601),
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AZALIA_PIN_CFG(0, 0x1e, 0x01452130),
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AZALIA_PIN_CFG(0, 0x1f, 0x411111f0),
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AZALIA_PIN_CFG(0, 0x1f, AZALIA_PIN_CFG_NC(0)),
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0x80862806, /* Codec Vendor / Device ID: Intel */
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0x80860101, /* Subsystem ID */
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@@ -7,20 +7,20 @@ const u32 cim_verb_data[] = {
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0x18498892, /* Subsystem ID */
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15, /* Number of 4 dword sets */
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AZALIA_SUBVENDOR(0, 0x18498892),
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AZALIA_PIN_CFG(0, 0x11, 0x411111f0),
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AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
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AZALIA_PIN_CFG(0, 0x11, AZALIA_PIN_CFG_NC(0)),
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AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_CFG_NC(0)),
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AZALIA_PIN_CFG(0, 0x14, 0x01014010),
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AZALIA_PIN_CFG(0, 0x15, 0x01011012),
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AZALIA_PIN_CFG(0, 0x16, 0x01016011),
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AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
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AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
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AZALIA_PIN_CFG(0, 0x18, 0x01a19840),
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AZALIA_PIN_CFG(0, 0x19, 0x02a19950),
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AZALIA_PIN_CFG(0, 0x1a, 0x0181304f),
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AZALIA_PIN_CFG(0, 0x1b, 0x02214120),
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AZALIA_PIN_CFG(0, 0x1c, 0x411111f0),
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AZALIA_PIN_CFG(0, 0x1c, AZALIA_PIN_CFG_NC(0)),
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AZALIA_PIN_CFG(0, 0x1d, 0x4005e601),
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AZALIA_PIN_CFG(0, 0x1e, 0x01452130),
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AZALIA_PIN_CFG(0, 0x1f, 0x411111f0),
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AZALIA_PIN_CFG(0, 0x1f, AZALIA_PIN_CFG_NC(0)),
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0x80862806, /* Codec Vendor / Device ID: Intel */
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0x80860101, /* Subsystem ID */
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@@ -7,15 +7,15 @@ const u32 cim_verb_data[] = {
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0x1849c892, /* Subsystem ID */
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11, /* Number of 4 dword sets */
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AZALIA_SUBVENDOR(0, 0x1849c892),
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AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
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AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_CFG_NC(0)),
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AZALIA_PIN_CFG(0, 0x14, 0x01014020),
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AZALIA_PIN_CFG(0, 0x17, 0x90170110),
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AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
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AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
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AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)),
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AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)),
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AZALIA_PIN_CFG(0, 0x1a, 0x02a11c3f),
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AZALIA_PIN_CFG(0, 0x1b, 0x01813c30),
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AZALIA_PIN_CFG(0, 0x1d, 0x598301f0),
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AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
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AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
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AZALIA_PIN_CFG(0, 0x21, 0x0221102f),
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0x10ec0887, /* Codec Vendor / Device ID: Realtek ALC887 */
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@@ -23,18 +23,18 @@ const u32 cim_verb_data[] = {
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15, /* Number of 4 dword sets */
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AZALIA_SUBVENDOR(2, 0x1458a002),
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AZALIA_PIN_CFG(2, 0x11, 0x411110f0),
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AZALIA_PIN_CFG(2, 0x12, 0x411111f0),
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AZALIA_PIN_CFG(2, 0x12, AZALIA_PIN_CFG_NC(0)),
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AZALIA_PIN_CFG(2, 0x14, 0x01014410),
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AZALIA_PIN_CFG(2, 0x15, 0x411111f0),
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AZALIA_PIN_CFG(2, 0x16, 0x411111f0),
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AZALIA_PIN_CFG(2, 0x17, 0x411111f0),
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AZALIA_PIN_CFG(2, 0x15, AZALIA_PIN_CFG_NC(0)),
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AZALIA_PIN_CFG(2, 0x16, AZALIA_PIN_CFG_NC(0)),
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AZALIA_PIN_CFG(2, 0x17, AZALIA_PIN_CFG_NC(0)),
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AZALIA_PIN_CFG(2, 0x18, 0x01a19c50),
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AZALIA_PIN_CFG(2, 0x19, 0x02a19c60),
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AZALIA_PIN_CFG(2, 0x1a, 0x0181345f),
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AZALIA_PIN_CFG(2, 0x1b, 0x02214c20),
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AZALIA_PIN_CFG(2, 0x1c, 0x411111f0),
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AZALIA_PIN_CFG(2, 0x1c, AZALIA_PIN_CFG_NC(0)),
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AZALIA_PIN_CFG(2, 0x1d, 0x4004c601),
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AZALIA_PIN_CFG(2, 0x1e, 0x411111f0),
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AZALIA_PIN_CFG(2, 0x1e, AZALIA_PIN_CFG_NC(0)),
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AZALIA_PIN_CFG(2, 0x1f, 0x41c46060),
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0x80862806, /* Codec Vendor / Device ID: Intel Haswell HDMI */
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@@ -12,15 +12,15 @@ const u32 cim_verb_data[] = {
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/* Pin Widget Verb Table */
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||||
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x01014010),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x15, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x16, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x01a19830),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x02a19940),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x0181303f),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x02214120),
|
||||
AZALIA_PIN_CFG(0, 0x1c, 0x593301f0),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x4004c601),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* coreboot specific header */
|
||||
/* Intel Eaglelake HDMI */
|
||||
@@ -40,15 +40,15 @@ const u32 cim_verb_data[] = {
|
||||
|
||||
/* Pin Widget Verb Table */
|
||||
AZALIA_PIN_CFG(2, 0x14, 0x01014410),
|
||||
AZALIA_PIN_CFG(2, 0x15, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x16, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x15, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x16, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x18, 0x01a19c30),
|
||||
AZALIA_PIN_CFG(2, 0x19, 0x02a19c40),
|
||||
AZALIA_PIN_CFG(2, 0x1a, 0x0181343f),
|
||||
AZALIA_PIN_CFG(2, 0x1b, 0x02214c20),
|
||||
AZALIA_PIN_CFG(2, 0x1c, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x1c, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x1d, 0x4004c601),
|
||||
AZALIA_PIN_CFG(2, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
};
|
||||
|
||||
const u32 pc_beep_verbs[0] = {};
|
||||
|
@@ -8,19 +8,19 @@ const u32 cim_verb_data[] = {
|
||||
15, /* Number of 4 dword sets */
|
||||
AZALIA_SUBVENDOR(0, 0x10438445),
|
||||
AZALIA_PIN_CFG(0, 0x11, 0x40000000),
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x01014020),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x90170110),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x16, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x01a19040),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x02a19050),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x0181304f),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x02214030),
|
||||
AZALIA_PIN_CFG(0, 0x1c, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1c, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x4026c629),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1f, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1f, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
0x80862809, /* Codec Vendor / Device ID: Intel Skylake HDMI */
|
||||
0x80860101, /* Subsystem ID */
|
||||
|
@@ -7,20 +7,20 @@ const u32 cim_verb_data[] = {
|
||||
0x18498892, /* Subsystem ID */
|
||||
15, /* Number of 4 dword sets */
|
||||
AZALIA_SUBVENDOR(0, 0x18498892),
|
||||
AZALIA_PIN_CFG(0, 0x11, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x11, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x01014010),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x01011012),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x01016011),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x01a19840),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x02a19950),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x0181304f),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x02214120),
|
||||
AZALIA_PIN_CFG(0, 0x1c, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1c, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x4005e601),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x01452130),
|
||||
AZALIA_PIN_CFG(0, 0x1f, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1f, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
0x80862806, /* Codec Vendor / Device ID: Intel */
|
||||
0x80860101, /* Subsystem ID */
|
||||
|
@@ -10,14 +10,14 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_SUBVENDOR(1, 0x18497662),
|
||||
AZALIA_PIN_CFG(1, 0x14, 0x01014010),
|
||||
AZALIA_PIN_CFG(1, 0x15, 0x40000000),
|
||||
AZALIA_PIN_CFG(1, 0x16, 0x411111f0),
|
||||
AZALIA_PIN_CFG(1, 0x16, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(1, 0x18, 0x01a19040),
|
||||
AZALIA_PIN_CFG(1, 0x19, 0x02a19050),
|
||||
AZALIA_PIN_CFG(1, 0x1a, 0x0181304f),
|
||||
AZALIA_PIN_CFG(1, 0x1b, 0x02214020),
|
||||
AZALIA_PIN_CFG(1, 0x1c, 0x411111f0),
|
||||
AZALIA_PIN_CFG(1, 0x1c, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(1, 0x1d, 0x40a4c601),
|
||||
AZALIA_PIN_CFG(1, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(1, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
};
|
||||
|
||||
const u32 pc_beep_verbs[] = {};
|
||||
|
@@ -11,7 +11,7 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x01014010),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x01011012),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x01016011),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x01a19040),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x02a19050),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x0181304f),
|
||||
|
@@ -11,7 +11,7 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x01014010),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x01011012),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x01016011),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x01a19040),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x02a19050),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x0181304f),
|
||||
|
@@ -9,19 +9,19 @@ const u32 cim_verb_data[] = {
|
||||
15, /* Number of 4 dword sets */
|
||||
AZALIA_SUBVENDOR(0, 0x10438445),
|
||||
AZALIA_PIN_CFG(0, 0x11, 0x40330000),
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x01014010),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x15, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x16, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x01a19030),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x02a19040),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x0181303f),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x02214020),
|
||||
AZALIA_PIN_CFG(0, 0x1c, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1c, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x4024c601),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1f, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1f, AZALIA_PIN_CFG_NC(0)),
|
||||
};
|
||||
|
||||
const u32 pc_beep_verbs[0] = {};
|
||||
|
@@ -9,19 +9,19 @@ const u32 cim_verb_data[] = {
|
||||
15, /* Number of entries */
|
||||
AZALIA_SUBVENDOR(0, 0x10438445),
|
||||
AZALIA_PIN_CFG(0, 0x11, 0x99430130),
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x01014010),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x15, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x16, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x01a19840),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x02a19c50),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x0181304f),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x02214c20),
|
||||
AZALIA_PIN_CFG(0, 0x1c, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1c, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x4004c601),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1f, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1f, AZALIA_PIN_CFG_NC(0)),
|
||||
};
|
||||
|
||||
const u32 pc_beep_verbs[] = {};
|
||||
|
@@ -8,7 +8,7 @@ const u32 cim_verb_data[] = {
|
||||
15, /* Number of 4 dword sets */
|
||||
AZALIA_SUBVENDOR(0, 0x10438444),
|
||||
AZALIA_PIN_CFG(0, 0x11, 0x99430140),
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x01014010),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x01011012),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x01016011),
|
||||
@@ -17,10 +17,10 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x02a19c60),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x0181305f),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x02214c20),
|
||||
AZALIA_PIN_CFG(0, 0x1c, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1c, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x4005e601),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x01456130),
|
||||
AZALIA_PIN_CFG(0, 0x1f, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1f, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
0x80862805, /* Codec Vendor / Device ID: Intel */
|
||||
0x80860101, /* Subsystem ID */
|
||||
|
@@ -8,7 +8,7 @@ const u32 cim_verb_data[] = {
|
||||
15, /* Number of 4 dword sets */
|
||||
AZALIA_SUBVENDOR(0, 0x10438444),
|
||||
AZALIA_PIN_CFG(0, 0x11, 0x99430140),
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x01014010),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x01011012),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x01016011),
|
||||
@@ -17,10 +17,10 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x02a19c60),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x0181305f),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x02214c20),
|
||||
AZALIA_PIN_CFG(0, 0x1c, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1c, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x4005e601),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x01456130),
|
||||
AZALIA_PIN_CFG(0, 0x1f, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1f, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
0x80862805, /* Codec Vendor / Device ID: Intel HDMI */
|
||||
0x80860101, /* Subsystem ID */
|
||||
|
@@ -10,9 +10,9 @@ const u32 cim_verb_data[] = {
|
||||
|
||||
/* Pin Widget Verb Table */
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x01014010),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x15, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x16, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x01a19840),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x02a19850),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x0181304f),
|
||||
@@ -20,7 +20,7 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x1c, 0x593301f0),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x4005c603),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x18561130),
|
||||
AZALIA_PIN_CFG(0, 0x1f, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1f, AZALIA_PIN_CFG_NC(0)),
|
||||
};
|
||||
|
||||
const u32 pc_beep_verbs[0] = {};
|
||||
|
@@ -22,7 +22,7 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x1c, 0x593301f0),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x4015e601),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x01447130),
|
||||
AZALIA_PIN_CFG(0, 0x1f, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1f, AZALIA_PIN_CFG_NC(0)),
|
||||
};
|
||||
|
||||
const u32 pc_beep_verbs[0] = {};
|
||||
|
@@ -20,8 +20,8 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x02214c20),
|
||||
AZALIA_PIN_CFG(0, 0x1c, 0x593301f0),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x4015e601),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1f, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1f, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* HDMI audio */
|
||||
0x80862803,
|
||||
|
@@ -11,12 +11,12 @@ const u32 cim_verb_data[] = {
|
||||
|
||||
/* Pin Widget Verb Table */
|
||||
|
||||
AZALIA_PIN_CFG(0, 0x11, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x11, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x01014010),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x15, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x16, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x01a19840),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x02a19850),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x0181304f),
|
||||
@@ -24,7 +24,7 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x1c, 0x593301f0),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x4004c601),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x99430130),
|
||||
AZALIA_PIN_CFG(0, 0x1f, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1f, AZALIA_PIN_CFG_NC(0)),
|
||||
};
|
||||
|
||||
const u32 pc_beep_verbs[0] = {};
|
||||
|
@@ -8,7 +8,7 @@ const u32 cim_verb_data[] = {
|
||||
15, /* Number of 4 dword sets */
|
||||
AZALIA_SUBVENDOR(0, 0x104384fb),
|
||||
AZALIA_PIN_CFG(0, 0x11, 0x99430140),
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x01014010),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x01011012),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x01016011),
|
||||
@@ -17,10 +17,10 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x02a19c60),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x0181305f),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x02214c20),
|
||||
AZALIA_PIN_CFG(0, 0x1c, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1c, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x4005e601),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x014b6130),
|
||||
AZALIA_PIN_CFG(0, 0x1f, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1f, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
};
|
||||
|
||||
|
@@ -8,7 +8,7 @@ const u32 cim_verb_data[] = {
|
||||
15, /* Number of 4 dword sets */
|
||||
AZALIA_SUBVENDOR(0, 0x10438436),
|
||||
AZALIA_PIN_CFG(0, 0x11, 0x99430140),
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x01014010),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x01011012),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x01016011),
|
||||
@@ -17,10 +17,10 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x02a19c60),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x0181305f),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x02214c20),
|
||||
AZALIA_PIN_CFG(0, 0x1c, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1c, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x4005e601),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x01456130),
|
||||
AZALIA_PIN_CFG(0, 0x1f, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1f, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
0x80862806, /* Codec Vendor / Device ID: Intel */
|
||||
0x80860101, /* Subsystem ID */
|
||||
|
@@ -8,7 +8,7 @@ const u32 cim_verb_data[] = {
|
||||
15, /* Number of 4 dword sets */
|
||||
AZALIA_SUBVENDOR(0, 0x104384fb),
|
||||
AZALIA_PIN_CFG(0, 0x11, 0x99430140),
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x01014010),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x01011012),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x01016011),
|
||||
@@ -17,10 +17,10 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x02a19c60),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x0181305f),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x02214c20),
|
||||
AZALIA_PIN_CFG(0, 0x1c, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1c, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x4005e601),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x01456130),
|
||||
AZALIA_PIN_CFG(0, 0x1f, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1f, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
0x80862806, /* Codec Vendor / Device ID: Intel HDMI */
|
||||
0x80860101, /* Subsystem ID */
|
||||
|
@@ -8,19 +8,19 @@ const u32 cim_verb_data[] = {
|
||||
15, /* Number of 4 dword sets */
|
||||
AZALIA_SUBVENDOR(0, 0x10438445),
|
||||
AZALIA_PIN_CFG(0, 0x11, 0x99430130),
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x01014010),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x15, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x16, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x01a19840),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x02a19c50),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x0181304f),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x02214c20),
|
||||
AZALIA_PIN_CFG(0, 0x1c, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1c, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x4004c601),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1f, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1f, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
0x80862806, /* Codec Vendor / Device ID: Intel HDMI */
|
||||
0x80860101, /* Subsystem ID */
|
||||
|
@@ -8,19 +8,19 @@ const u32 cim_verb_data[] = {
|
||||
15, /* Number of 4 dword sets */
|
||||
AZALIA_SUBVENDOR(2, 0x15658229),
|
||||
AZALIA_PIN_CFG(2, 0x11, 0x01452130),
|
||||
AZALIA_PIN_CFG(2, 0x12, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x12, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x14, 0x01014410),
|
||||
AZALIA_PIN_CFG(2, 0x15, 0x01011412),
|
||||
AZALIA_PIN_CFG(2, 0x16, 0x01016411),
|
||||
AZALIA_PIN_CFG(2, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x18, 0x01a19c40),
|
||||
AZALIA_PIN_CFG(2, 0x19, 0x02a19850),
|
||||
AZALIA_PIN_CFG(2, 0x1a, 0x0181344f),
|
||||
AZALIA_PIN_CFG(2, 0x1b, 0x02214020),
|
||||
AZALIA_PIN_CFG(2, 0x1c, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x1c, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x1d, 0x4005e601),
|
||||
AZALIA_PIN_CFG(2, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x1f, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x1f, AZALIA_PIN_CFG_NC(0)),
|
||||
};
|
||||
|
||||
const u32 pc_beep_verbs[0] = {};
|
||||
|
@@ -12,13 +12,13 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x13, 0x40000000),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x90170110),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x02211020),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x16, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x01a1913c),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x41748245),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Intel GPU HDMI */
|
||||
0x8086280b, /* Vendor ID */
|
||||
|
@@ -13,11 +13,11 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x02211010),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x40000000),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x02a11030),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x40f4a205),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Intel iGPU HDMI */
|
||||
0x8086280b,
|
||||
|
@@ -8,17 +8,17 @@ const u32 cim_verb_data[] = {
|
||||
15, /* Number of 4 dword sets */
|
||||
AZALIA_SUBVENDOR(0, 0x10ec0888),
|
||||
AZALIA_PIN_CFG(0, 0x11, 0x411110f0),
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x01214120),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x15, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x16, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x01a19131),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1c, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1c, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x014421f0),
|
||||
AZALIA_PIN_CFG(0, 0x1f, 0x01c421f0),
|
||||
|
||||
|
@@ -9,17 +9,17 @@ const u32 cim_verb_data[] = {
|
||||
13, /* Number of entries */
|
||||
AZALIA_SUBVENDOR(0, 0x102805a5),
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x4008c000),
|
||||
AZALIA_PIN_CFG(0, 0x13, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x13, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x90170110),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x0221401f),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x16, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x01a13040),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x02a19030),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x01014020),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x40400001),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
};
|
||||
|
||||
const u32 pc_beep_verbs[] = {};
|
||||
|
@@ -9,15 +9,15 @@ const u32 cim_verb_data[] = {
|
||||
11, /* Number of 4 dword sets */
|
||||
|
||||
AZALIA_SUBVENDOR(0, 0x1028052c),
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x99130110),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x02a19830),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x01a19840),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x01014020),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1d, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x21, 0x0221402f),
|
||||
|
||||
0x80862806, /* Codec Vendor / Device ID: Intel */
|
||||
|
@@ -9,15 +9,15 @@ const u32 cim_verb_data[] = {
|
||||
11, /* Number of 4 dword sets */
|
||||
|
||||
AZALIA_SUBVENDOR(0, 0x1028053a),
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x99130110),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x02a19830),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x01a19840),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x01014020),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1d, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x21, 0x0221402f),
|
||||
|
||||
0x80862806, /* Codec Vendor / Device ID: Intel */
|
||||
|
@@ -10,13 +10,13 @@ const u32 cim_verb_data[] = {
|
||||
|
||||
/* Pin Widget Verb Table */
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x01014c10),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x15, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x16, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x01a19c30),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x02a19c31),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x0181343f),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x02214c1f),
|
||||
AZALIA_PIN_CFG(0, 0x1c, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1c, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x4005c603),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x99430120),
|
||||
};
|
||||
|
@@ -12,19 +12,19 @@ const u32 cim_verb_data[] = {
|
||||
/* Pin Widget Verb Table */
|
||||
|
||||
AZALIA_PIN_CFG(0, 0x11, 0x99430140),
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x01014410),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x15, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x16, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x01a19c50),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x02a19c60),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x0181345f),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x02214c20),
|
||||
AZALIA_PIN_CFG(0, 0x1c, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1c, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x4004c601),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x01441130),
|
||||
AZALIA_PIN_CFG(0, 0x1f, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1f, AZALIA_PIN_CFG_NC(0)),
|
||||
};
|
||||
#else /* CONFIG_BOARD_FOXCONN_G41M */
|
||||
const u32 cim_verb_data[] = {
|
||||
@@ -36,7 +36,7 @@ const u32 cim_verb_data[] = {
|
||||
/* Pin Widget Verb Table */
|
||||
|
||||
AZALIA_PIN_CFG(2, 0x11, 0x01441140),
|
||||
AZALIA_PIN_CFG(2, 0x12, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x12, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x14, 0x01014410),
|
||||
AZALIA_PIN_CFG(2, 0x15, 0x01011412),
|
||||
AZALIA_PIN_CFG(2, 0x16, 0x01016411),
|
||||
@@ -48,7 +48,7 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(2, 0x1c, 0x593301f0),
|
||||
AZALIA_PIN_CFG(2, 0x1d, 0x4007f603),
|
||||
AZALIA_PIN_CFG(2, 0x1e, 0x99430130),
|
||||
AZALIA_PIN_CFG(2, 0x1f, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x1f, AZALIA_PIN_CFG_NC(0)),
|
||||
};
|
||||
#endif
|
||||
|
||||
|
@@ -10,8 +10,8 @@ const u32 cim_verb_data[] = {
|
||||
|
||||
/* Pin Widget Verb Table */
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x01014010),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x15, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x16, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x01a19830),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x02a19c31),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x0181303f),
|
||||
|
@@ -14,19 +14,19 @@ const u32 cim_verb_data[] = {
|
||||
|
||||
/* Pin Widget Verb Table */
|
||||
AZALIA_PIN_CFG(2, 0x11, 0x99430130),
|
||||
AZALIA_PIN_CFG(2, 0x12, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x12, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x14, 0x01014410),
|
||||
AZALIA_PIN_CFG(2, 0x15, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x16, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x15, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x16, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x18, 0x01a19c50),
|
||||
AZALIA_PIN_CFG(2, 0x19, 0x02a19c60),
|
||||
AZALIA_PIN_CFG(2, 0x1a, 0x0181345f),
|
||||
AZALIA_PIN_CFG(2, 0x1b, 0x02214c20),
|
||||
AZALIA_PIN_CFG(2, 0x1c, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x1c, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x1d, 0x4004c601),
|
||||
AZALIA_PIN_CFG(2, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x1f, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x1f, AZALIA_PIN_CFG_NC(0)),
|
||||
};
|
||||
|
||||
#endif
|
||||
|
@@ -10,20 +10,20 @@ const u32 cim_verb_data[] = {
|
||||
0x0000000e, // Number of entries
|
||||
|
||||
/* Pin Widget Verb Table */
|
||||
AZALIA_PIN_CFG(0, 0x11, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x11, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x01014410),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x15, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x16, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x01a19c50),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x02a19c60),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x0181345f),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x02214c20),
|
||||
AZALIA_PIN_CFG(0, 0x1c, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1c, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x4004c601),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1f, 0x411111f0)
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1f, AZALIA_PIN_CFG_NC(0))
|
||||
};
|
||||
|
||||
#endif
|
||||
|
@@ -7,20 +7,20 @@ const u32 cim_verb_data[] = {
|
||||
0x1458a002, /* Subsystem ID */
|
||||
15, /* Number of 4 dword sets */
|
||||
AZALIA_SUBVENDOR(2, 0x1458a002),
|
||||
AZALIA_PIN_CFG(2, 0x11, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x12, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x11, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x12, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x14, 0x01014410),
|
||||
AZALIA_PIN_CFG(2, 0x15, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x16, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x15, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x16, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x18, 0x01a19c30),
|
||||
AZALIA_PIN_CFG(2, 0x19, 0x02a19c50),
|
||||
AZALIA_PIN_CFG(2, 0x1a, 0x0181344f),
|
||||
AZALIA_PIN_CFG(2, 0x1b, 0x02214c20),
|
||||
AZALIA_PIN_CFG(2, 0x1c, 0x593301f0),
|
||||
AZALIA_PIN_CFG(2, 0x1d, 0x4005c603),
|
||||
AZALIA_PIN_CFG(2, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x1f, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x1f, AZALIA_PIN_CFG_NC(0)),
|
||||
};
|
||||
|
||||
const u32 pc_beep_verbs[] = {};
|
||||
|
@@ -11,11 +11,11 @@ const u32 cim_verb_data[] = {
|
||||
/* Pin Widget Verb Table */
|
||||
|
||||
AZALIA_PIN_CFG(0, 0x11, 0x411110f0),
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x01014410),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x15, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x16, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x01a19c40),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x02a19c50),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x0181344f),
|
||||
|
@@ -8,19 +8,19 @@ const u32 cim_verb_data[] = {
|
||||
15, /* Number of 4 dword sets */
|
||||
AZALIA_SUBVENDOR(2, 0x1458a002),
|
||||
AZALIA_PIN_CFG(2, 0x11, 0x411110f0),
|
||||
AZALIA_PIN_CFG(2, 0x12, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x12, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x14, 0x01014410),
|
||||
AZALIA_PIN_CFG(2, 0x15, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x16, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x15, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x16, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x18, 0x01a19c20),
|
||||
AZALIA_PIN_CFG(2, 0x19, 0x02a19c30),
|
||||
AZALIA_PIN_CFG(2, 0x1a, 0x0181342f),
|
||||
AZALIA_PIN_CFG(2, 0x1b, 0x02214c1f),
|
||||
AZALIA_PIN_CFG(2, 0x1c, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x1c, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x1d, 0x4004c601),
|
||||
AZALIA_PIN_CFG(2, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x1f, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x1f, AZALIA_PIN_CFG_NC(0)),
|
||||
};
|
||||
|
||||
const u32 pc_beep_verbs[0] = {};
|
||||
|
@@ -7,20 +7,20 @@ const u32 cim_verb_data[] = {
|
||||
0x1458a002, /* Subsystem ID */
|
||||
15, /* Number of 4 dword sets */
|
||||
AZALIA_SUBVENDOR(2, 0x1458a002),
|
||||
AZALIA_PIN_CFG(2, 0x11, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x12, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x11, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x12, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x14, 0x01014410),
|
||||
AZALIA_PIN_CFG(2, 0x15, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x16, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x15, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x16, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x18, 0x01a19c50),
|
||||
AZALIA_PIN_CFG(2, 0x19, 0x02a19c60),
|
||||
AZALIA_PIN_CFG(2, 0x1a, 0x0181345f),
|
||||
AZALIA_PIN_CFG(2, 0x1b, 0x02214c20),
|
||||
AZALIA_PIN_CFG(2, 0x1c, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x1c, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x1d, 0x4004c601),
|
||||
AZALIA_PIN_CFG(2, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x1f, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x1f, AZALIA_PIN_CFG_NC(0)),
|
||||
};
|
||||
|
||||
const u32 pc_beep_verbs[0] = {};
|
||||
|
@@ -7,20 +7,20 @@ const u32 cim_verb_data[] = {
|
||||
0x1458a002, /* Subsystem ID */
|
||||
15, /* Number of 4 dword sets */
|
||||
AZALIA_SUBVENDOR(2, 0x1458a002),
|
||||
AZALIA_PIN_CFG(2, 0x11, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x12, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x11, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x12, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x14, 0x01014410),
|
||||
AZALIA_PIN_CFG(2, 0x15, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x16, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x15, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x16, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x18, 0x01a19c50),
|
||||
AZALIA_PIN_CFG(2, 0x19, 0x02a19c60),
|
||||
AZALIA_PIN_CFG(2, 0x1a, 0x0181345f),
|
||||
AZALIA_PIN_CFG(2, 0x1b, 0x02214c20),
|
||||
AZALIA_PIN_CFG(2, 0x1c, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x1c, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x1d, 0x4004c601),
|
||||
AZALIA_PIN_CFG(2, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x1f, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x1f, AZALIA_PIN_CFG_NC(0)),
|
||||
};
|
||||
|
||||
const u32 pc_beep_verbs[0] = {};
|
||||
|
@@ -8,18 +8,18 @@ const u32 cim_verb_data[] = {
|
||||
15, /* Number of 4 dword sets */
|
||||
AZALIA_SUBVENDOR(2, 0x1458a002),
|
||||
AZALIA_PIN_CFG(2, 0x11, 0x411110f0),
|
||||
AZALIA_PIN_CFG(2, 0x12, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x12, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x14, 0x01014410),
|
||||
AZALIA_PIN_CFG(2, 0x15, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x16, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x15, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x16, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x18, 0x01a19c50),
|
||||
AZALIA_PIN_CFG(2, 0x19, 0x02a19c60),
|
||||
AZALIA_PIN_CFG(2, 0x1a, 0x0181345f),
|
||||
AZALIA_PIN_CFG(2, 0x1b, 0x02214c20),
|
||||
AZALIA_PIN_CFG(2, 0x1c, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x1c, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x1d, 0x4004c601),
|
||||
AZALIA_PIN_CFG(2, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x1f, 0x41c46060),
|
||||
};
|
||||
|
||||
|
@@ -24,7 +24,7 @@ const u32 cim_verb_data[] = {
|
||||
/* Pin Widget Verb Table */
|
||||
|
||||
/* Pin Complex (NID 0x12) DMIC - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x14) SPKR-OUT - Internal Speakers */
|
||||
// group 1, cap 0
|
||||
@@ -34,10 +34,10 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x90170110),
|
||||
|
||||
/* Pin Complex (NID 0x17) MONO Out - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x18) MIC1 PORTB - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x19) MIC2 - 3.5mm Jack */
|
||||
// group2, cap 0
|
||||
@@ -54,7 +54,7 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x1A, 0x90a70111),
|
||||
|
||||
/* Pin Complex (NID 0x1B) LINE2 - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x1B, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1B, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x1D) PCBeep */
|
||||
// eapd low on ex-amp, laptop, custom enable
|
||||
@@ -64,7 +64,7 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x1D, 0x4015812d),
|
||||
|
||||
/* Pin Complex (NID 0x1E) SPDIF-OUT - Disabled*/
|
||||
AZALIA_PIN_CFG(0, 0x1E, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1E, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x21) HP-OUT - 3.5mm Jack*/
|
||||
// group2, cap 1
|
||||
|
@@ -37,7 +37,7 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x40000008),
|
||||
|
||||
/* Pin Complex (NID 0x18) Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x19) MIC2 - 3.5mm Jack */
|
||||
// group2, cap 0
|
||||
@@ -47,10 +47,10 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x03a11020),
|
||||
|
||||
/* Pin Complex (NID 0x1A) LINE1 - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x1A, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1A, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x1B) LINE2 - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x1B, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1B, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x1D) PCBeep */
|
||||
// eapd low on ex-amp, laptop, custom enable
|
||||
@@ -60,7 +60,7 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x1D, 0x4015812d),
|
||||
|
||||
/* Pin Complex (NID 0x1E) SPDIF-OUT - Disabled*/
|
||||
AZALIA_PIN_CFG(0, 0x1E, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1E, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x21) HP-OUT - 3.5mm Jack*/
|
||||
// group1
|
||||
|
@@ -38,10 +38,10 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x90170110),
|
||||
|
||||
/* Pin Complex (NID 0x17) MONO Out - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x18) MIC1 PORTB - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x19) MIC2 - 3.5mm Jack */
|
||||
// group2, cap 0
|
||||
@@ -51,10 +51,10 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x03a11020),
|
||||
|
||||
/* Pin Complex (NID 0x1A) LINE1 - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x1A, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1A, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x1B) LINE2 - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x1B, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1B, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x1D) PCBeep */
|
||||
// eapd low on ex-amp, laptop, custom enable
|
||||
@@ -64,7 +64,7 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x1D, 0x4015812d),
|
||||
|
||||
/* Pin Complex (NID 0x1E) SPDIF-OUT - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x1E, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1E, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x21) HP-OUT - 3.5mm Jack */
|
||||
// group2, cap 1
|
||||
|
@@ -38,10 +38,10 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x90170110),
|
||||
|
||||
/* Pin Complex (NID 0x17) MONO Out - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x18) MIC1 PORTB - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x19) MIC2 - 3.5mm Jack */
|
||||
// group2, cap 0
|
||||
@@ -51,10 +51,10 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x03a11020),
|
||||
|
||||
/* Pin Complex (NID 0x1A) LINE1 - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x1A, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1A, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x1B) LINE2 - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x1B, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1B, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x1D) PCBeep */
|
||||
// eapd low on ex-amp, laptop, custom enable
|
||||
@@ -64,7 +64,7 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x4015812d),
|
||||
|
||||
/* Pin Complex (NID 0x1E) SPDIF-OUT - Disabled*/
|
||||
AZALIA_PIN_CFG(0, 0x1E, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1E, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x21) HP-OUT - 3.5mm Jack*/
|
||||
// group2, cap 1
|
||||
|
@@ -19,16 +19,16 @@ const u32 cim_verb_data[] = {
|
||||
/* Pin Widget Verb Table */
|
||||
|
||||
/* Pin Complex (NID 0x12) DMIC - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x14) SPKR-OUT PORTD - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x401111f0),
|
||||
|
||||
/* Pin Complex (NID 0x17) MONO Out - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x18) MIC1 PORTB - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x19) MIC2 PORTF */
|
||||
// group 1, cap 1
|
||||
@@ -38,10 +38,10 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x03a71011),
|
||||
|
||||
/* Pin Complex (NID 0x1A) LINE1 PORTC - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x1B) LINE2 PORTE - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x1d) PCBeep */
|
||||
// eapd low on ex-amp, laptop, custom enable
|
||||
@@ -51,7 +51,7 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x4015812d),
|
||||
|
||||
/* Pin Complex (NID 0x1E) SPDIF-OUT - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x21) HPOUT PORT-I */
|
||||
// group1,
|
||||
|
@@ -25,19 +25,19 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x401111f0),
|
||||
|
||||
/* Pin Complex (NID 0x17) MONO Out - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x18) MIC1 PORTB - Disabled*/
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x19) MIC2 PORTF - 3.5mm Jack*/
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x03a11020),
|
||||
|
||||
/* Pin Complex (NID 0x1A) LINE1 PORTC - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x1B) LINE2 PORTE - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x1d) PCBeep */
|
||||
// eapd low on ex-amp, laptop, custom enable
|
||||
@@ -47,10 +47,10 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x4015812d),
|
||||
|
||||
/* Pin Complex (NID 0x1E) SPDIF-OUT - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x21) HPOUT PORT-I - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x21, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x21, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Undocumented settings from Realtek (needed for beep_gen) */
|
||||
/* Widget node 0x20 */
|
||||
|
@@ -19,16 +19,16 @@ const u32 cim_verb_data[] = {
|
||||
/* Pin Widget Verb Table */
|
||||
|
||||
/* Pin Complex (NID 0x12) DMIC - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x14) SPKR-OUT PORTD - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x401111f0),
|
||||
|
||||
/* Pin Complex (NID 0x17) MONO Out - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x18) MIC1 PORTB - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x19) MIC2 PORTF */
|
||||
// group 1, cap 1
|
||||
@@ -38,10 +38,10 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x03a71011),
|
||||
|
||||
/* Pin Complex (NID 0x1A) LINE1 PORTC - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x1B) LINE2 PORTE - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x1d) PCBeep */
|
||||
// eapd low on ex-amp, laptop, custom enable
|
||||
@@ -51,7 +51,7 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x4015812d),
|
||||
|
||||
/* Pin Complex (NID 0x1E) SPDIF-OUT - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x21) HPOUT PORT-I */
|
||||
// group1,
|
||||
|
@@ -19,16 +19,16 @@ const u32 cim_verb_data[] = {
|
||||
/* Pin Widget Verb Table */
|
||||
|
||||
/* Pin Complex (NID 0x12) DMIC - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x14) SPKR-OUT PORTD - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x401111f0),
|
||||
|
||||
/* Pin Complex (NID 0x17) MONO Out - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x18) MIC1 PORTB - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x19) MIC2 PORTF */
|
||||
// group 1, cap 1
|
||||
@@ -38,10 +38,10 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x03a71011),
|
||||
|
||||
/* Pin Complex (NID 0x1A) LINE1 PORTC - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x1B) LINE2 PORTE - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x1d) PCBeep */
|
||||
// eapd low on ex-amp, laptop, custom enable
|
||||
@@ -51,7 +51,7 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x4015812d),
|
||||
|
||||
/* Pin Complex (NID 0x1E) SPDIF-OUT - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x21) HPOUT PORT-I */
|
||||
// group1,
|
||||
|
@@ -19,16 +19,16 @@ const u32 cim_verb_data[] = {
|
||||
/* Pin Widget Verb Table */
|
||||
|
||||
/* Pin Complex (NID 0x12) DMIC - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x14) SPKR-OUT PORTD - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x401111f0),
|
||||
|
||||
/* Pin Complex (NID 0x17) MONO Out - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x18) MIC1 PORTB - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x19) MIC2 PORTF */
|
||||
// group 1, cap 1
|
||||
@@ -38,10 +38,10 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x03a71011),
|
||||
|
||||
/* Pin Complex (NID 0x1A) LINE1 PORTC - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x1B) LINE2 PORTE - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x1d) PCBeep */
|
||||
// eapd low on ex-amp, laptop, custom enable
|
||||
@@ -51,7 +51,7 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x4015812d),
|
||||
|
||||
/* Pin Complex (NID 0x1E) SPDIF-OUT - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x21) HPOUT PORT-I */
|
||||
// group1,
|
||||
|
@@ -18,14 +18,14 @@ const u32 cim_verb_data[] = {
|
||||
|
||||
/* Pin Widget Verb Table */
|
||||
AZALIA_PIN_CFG(0, 0x12, 0xb7a60130),
|
||||
AZALIA_PIN_CFG(0, 0x13, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x13, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x90170110),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x40000000),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x04a11030),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x40c00001),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x421212f2),
|
||||
AZALIA_PIN_CFG(0, 0x21, 0x04211020),
|
||||
|
@@ -19,16 +19,16 @@ const u32 cim_verb_data[] = {
|
||||
/* Pin Widget Verb Table */
|
||||
|
||||
/* Pin Complex (NID 0x12) DMIC - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x14) SPKR-OUT PORTD - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x14, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x17) MONO Out - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x18) MIC1 PORTB - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x19) MIC2 PORTF */
|
||||
// group 1, cap 1
|
||||
@@ -38,10 +38,10 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x03a71011),
|
||||
|
||||
/* Pin Complex (NID 0x1A) LINE1 PORTC - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x1A, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1A, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x1B) LINE2 PORTE - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x1B, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1B, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x1D) PCBeep */
|
||||
// eapd low on ex-amp, laptop, custom enable
|
||||
@@ -51,7 +51,7 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x1D, 0x4015812d),
|
||||
|
||||
/* Pin Complex (NID 0x1E) SPDIF-OUT - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x1E, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1E, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x21) HPOUT PORT-I */
|
||||
// group1,
|
||||
|
@@ -29,7 +29,7 @@ const u32 cim_verb_data[] = {
|
||||
/* Pin Widget Verb Table */
|
||||
|
||||
/* Pin Complex (NID 0x12) DMIC */
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x14) SPKR-OUT PORTD */
|
||||
// group 1, front left/right
|
||||
@@ -39,10 +39,10 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x90170110),
|
||||
|
||||
/* Pin Complex (NID 0x17) */
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x18) MIC1 PORTB */
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x19) MIC2 PORTF */
|
||||
// group 2, cap 1
|
||||
@@ -52,7 +52,7 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x04a71021),
|
||||
|
||||
/* Pin Complex (NID 0x1A) LINE1 PORTC */
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x1B) LINE2 PORTE */
|
||||
// group 2, cap 0
|
||||
@@ -69,7 +69,7 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x4015812d),
|
||||
|
||||
/* Pin Complex (NID 0x1E) SPDIF-OUT */
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x21) HPOUT PORTA? */
|
||||
// group1,
|
||||
|
@@ -15,14 +15,14 @@ const u32 cim_verb_data[] = {
|
||||
|
||||
/* Pin Widget Verb Table */
|
||||
AZALIA_PIN_CFG(0, 0x12, 0xb7a60130),
|
||||
AZALIA_PIN_CFG(0, 0x13, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x13, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x90170110),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x40000000),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x04a11030),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x40c00001),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x421212f2),
|
||||
AZALIA_PIN_CFG(0, 0x21, 0x04211020),
|
||||
|
@@ -17,10 +17,10 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x90a60140),
|
||||
AZALIA_PIN_CFG(0, 0x13, 0x40000000),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x90170110),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x04a11030),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x40700001),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x421212f2),
|
||||
AZALIA_PIN_CFG(0, 0x21, 0x04211020),
|
||||
|
@@ -29,10 +29,10 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x90170110),
|
||||
|
||||
/* Pin Complex (NID 0x17) MONO Out - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x18) MIC1 PORTB - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x19) MIC2 PORTF */
|
||||
// group 1, cap 1
|
||||
@@ -42,10 +42,10 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x03a71011),
|
||||
|
||||
/* Pin Complex (NID 0x1A) LINE1 PORTC - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x1B) LINE2 PORTE - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x1d) PCBeep */
|
||||
// eapd low on ex-amp, laptop, custom enable
|
||||
@@ -55,7 +55,7 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x4015812d),
|
||||
|
||||
/* Pin Complex (NID 0x1E) SPDIF-OUT - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x21) HPOUT PORT-I */
|
||||
// group1,
|
||||
|
@@ -29,10 +29,10 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x90170110),
|
||||
|
||||
/* Pin Complex (NID 0x17) MONO Out - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x18) MIC1 PORTB - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x19) MIC2 - 3.5mm Jack */
|
||||
// group2, cap 0
|
||||
@@ -42,10 +42,10 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x03a11020),
|
||||
|
||||
/* Pin Complex (NID 0x1A) LINE1 - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x1B) LINE2 - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x1D) PCBeep */
|
||||
// eapd low on ex-amp, laptop, custom enable
|
||||
@@ -55,7 +55,7 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x4015812d),
|
||||
|
||||
/* Pin Complex (NID 0x1E) SPDIF-OUT - Disabled*/
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x21) HP-OUT - 3.5mm Jack*/
|
||||
// group2, cap 1
|
||||
|
@@ -19,7 +19,7 @@ const u32 cim_verb_data[] = {
|
||||
/* Pin Widget Verb Table */
|
||||
|
||||
/* Pin Complex (NID 0x12) DMIC - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x14) SPKR-OUT - Internal Speakers */
|
||||
// group 1, cap 0
|
||||
@@ -29,10 +29,10 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x90170110),
|
||||
|
||||
/* Pin Complex (NID 0x17) MONO Out - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x18) MIC1 PORTB - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x19) MIC2 - 3.5mm Jack */
|
||||
// group2, cap 0
|
||||
@@ -49,7 +49,7 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x90a70111),
|
||||
|
||||
/* Pin Complex (NID 0x1B) LINE2 - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x1D) PCBeep */
|
||||
// eapd low on ex-amp, laptop, custom enable
|
||||
@@ -59,7 +59,7 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x4015812d),
|
||||
|
||||
/* Pin Complex (NID 0x1E) SPDIF-OUT - Disabled*/
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x21) HP-OUT - 3.5mm Jack*/
|
||||
// group2, cap 1
|
||||
|
@@ -34,10 +34,10 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x90170110),
|
||||
|
||||
/* Pin Complex (NID 0x17) MONO Out - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x18) MIC1 PORTB - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x19) MIC2 - 3.5mm Jack */
|
||||
// group2, cap 0
|
||||
@@ -47,10 +47,10 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x03a11020),
|
||||
|
||||
/* Pin Complex (NID 0x1A) LINE1 PORTC - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x1B) LINE2 - Disabled */
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x1D) PCBeep */
|
||||
// eapd low on ex-amp, laptop, custom enable
|
||||
@@ -60,7 +60,7 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x4015812d),
|
||||
|
||||
/* Pin Complex (NID 0x1E) SPDIF-OUT - Disabled*/
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Pin Complex (NID 0x21) HP-OUT - 3.5mm Jack*/
|
||||
// group2, cap 1
|
||||
|
@@ -11,12 +11,12 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x40000000),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x01014010),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x90170120),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x01813030),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x4044c301),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x21, 0x0221101f),
|
||||
};
|
||||
|
||||
|
@@ -9,14 +9,14 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_SUBVENDOR(0, 0x103c1495),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x01014010),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x99130120),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x16, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x01813c30),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x02a11c3f),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x0221101f),
|
||||
AZALIA_PIN_CFG(0, 0x1c, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1c, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x40028101),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
0x80862805, /* Codec Vendor / Device ID: Intel */
|
||||
0x80861495, /* Subsystem ID */
|
||||
|
@@ -7,15 +7,15 @@ const u32 cim_verb_data[] = {
|
||||
0x103c3398, /* Subsystem ID */
|
||||
11, /* Number of 4 dword sets */
|
||||
AZALIA_SUBVENDOR(0, 0x103c3398),
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x01014020),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x90170110),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x02a11c3f),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x01813c30),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x598301f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x21, 0x0221102f),
|
||||
|
||||
0x80862806, /* Codec Vendor / Device ID: Intel */
|
||||
|
@@ -13,14 +13,14 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x13, 0x40000000),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x90170110),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x0421101f),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x16, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x04a11020),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x40748605),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
0x02050007, 0x0204c200, 0x02050063, 0x02044800,
|
||||
0x02050066, 0x02040809, 0x02050015, 0x02048842,
|
||||
|
@@ -12,14 +12,14 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x13, 0x40000000),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x90170110),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x0321101f),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x16, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x03a11020),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x40738105),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* The following is from the OEM firmware */
|
||||
0x02050007, 0x0204c200, 0x02050063, 0x02044800,
|
||||
|
@@ -8,15 +8,15 @@ const u32 cim_verb_data[] = {
|
||||
11, /* Number of 4 dword sets */
|
||||
AZALIA_SUBVENDOR(0, 0x103c2abf),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x01014010),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x15, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x16, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x01a19830),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x02a19831),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x0181303f),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x0221401f),
|
||||
AZALIA_PIN_CFG(0, 0x1c, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1c, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x4004c601),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
};
|
||||
|
||||
|
@@ -10,12 +10,12 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x403c0000),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x01014020),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x90170110),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x02a11030),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x0181303f),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x40400001),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x21, 0x0221102f),
|
||||
|
||||
0x80862806, /* Codec Vendor / Device ID: Intel */
|
||||
|
@@ -10,12 +10,12 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x403c0000),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x01014020),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x90170110),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x02a11030),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x0181303f),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x40400001),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x21, 0x0221102f),
|
||||
|
||||
0x80862806, /* Codec Vendor / Device ID: Intel */
|
||||
|
@@ -10,13 +10,13 @@ const u32 cim_verb_data[] = {
|
||||
|
||||
/* Pin Widget Verb Table */
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x01014410),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x15, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x16, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x01a19840),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x02a19841),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x0181304f),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x02214420),
|
||||
AZALIA_PIN_CFG(0, 0x1c, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1c, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x4015c603),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x99430130),
|
||||
};
|
||||
|
@@ -12,8 +12,8 @@ const u32 cim_verb_data[] = {
|
||||
/* Pin Widget Verb Table */
|
||||
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x01014010),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x15, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x16, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x01a19840),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x02a19c50),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x0181304f),
|
||||
|
@@ -11,19 +11,19 @@ const u32 cim_verb_data[] = {
|
||||
/* Pin Widget Verb Table */
|
||||
|
||||
AZALIA_PIN_CFG(0, 0x11, 0x01452140),
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x01014410),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x01011012),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x01016011),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x01a19850),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x02a19960),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x0181345f),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x02214520),
|
||||
AZALIA_PIN_CFG(0, 0x1c, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1c, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x4006f601),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x99430130),
|
||||
AZALIA_PIN_CFG(0, 0x1f, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1f, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* HDMI */
|
||||
0x80862803,
|
||||
|
@@ -7,20 +7,20 @@ const u32 cim_verb_data[] = {
|
||||
0x80862008, /* Subsystem ID */
|
||||
15, /* Number of 4 dword sets */
|
||||
AZALIA_SUBVENDOR(2, 0x80862008),
|
||||
AZALIA_PIN_CFG(2, 0x11, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x12, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x11, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x12, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x14, 0x01014410),
|
||||
AZALIA_PIN_CFG(2, 0x15, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x16, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x15, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x16, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x17, 0x99130140),
|
||||
AZALIA_PIN_CFG(2, 0x18, 0x01a19c50),
|
||||
AZALIA_PIN_CFG(2, 0x19, 0x02a19960),
|
||||
AZALIA_PIN_CFG(2, 0x1a, 0x0181345f),
|
||||
AZALIA_PIN_CFG(2, 0x1b, 0x02214120),
|
||||
AZALIA_PIN_CFG(2, 0x1c, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x1c, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(2, 0x1d, 0x4004c601),
|
||||
AZALIA_PIN_CFG(2, 0x1e, 0x99430130),
|
||||
AZALIA_PIN_CFG(2, 0x1f, 0x411111f0),
|
||||
AZALIA_PIN_CFG(2, 0x1f, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
0x80862805, /* Codec Vendor / Device ID: Intel */
|
||||
0x80862008, /* Subsystem ID */
|
||||
|
@@ -12,13 +12,13 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x13, 0x40000000),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x90170110),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x0321101f),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x16, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x03a11020),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x40738105),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
0x05350000, 0x0534601a, 0x05450000, 0x05442000,
|
||||
0x05350003, 0x05341ef8, 0x05450003, 0x05441ef8,
|
||||
|
@@ -12,13 +12,13 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x13, 0x40000000),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x90170110),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x0321101f),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x16, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x03a11020),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x40738105),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
0x05350000, 0x0534601a, 0x05450000, 0x05442000,
|
||||
0x05350003, 0x05341ef8, 0x05450003, 0x05441ef8,
|
||||
|
@@ -9,13 +9,13 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_SUBVENDOR(0, 0x17aa21de),
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x99a30920),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x99130110),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x03a11830),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x40079a2d),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x21, 0x0321101f),
|
||||
|
||||
0x80862805, /* Codec Vendor / Device ID: Intel */
|
||||
|
@@ -9,13 +9,13 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_SUBVENDOR(1, 0x17aa30d0),
|
||||
AZALIA_PIN_CFG(1, 0x12, 0x40000000),
|
||||
AZALIA_PIN_CFG(1, 0x14, 0x90170110),
|
||||
AZALIA_PIN_CFG(1, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(1, 0x18, 0x411111f0),
|
||||
AZALIA_PIN_CFG(1, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(1, 0x18, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(1, 0x19, 0x02a11030),
|
||||
AZALIA_PIN_CFG(1, 0x1a, 0x02a11040),
|
||||
AZALIA_PIN_CFG(1, 0x1b, 0x01011020),
|
||||
AZALIA_PIN_CFG(1, 0x1d, 0x40400001),
|
||||
AZALIA_PIN_CFG(1, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(1, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(1, 0x21, 0x0221101f),
|
||||
|
||||
0x80862809, /* Codec Vendor / Device ID: Intel Skylake HDMI */
|
||||
|
@@ -56,25 +56,25 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x03211020),
|
||||
|
||||
/* Unknown: (Unconnected) */
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* MIC1 in: Location left, mic in, 1/8" jack, black */
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x03a11830),
|
||||
|
||||
/* MIC2 in: (Unconnected) */
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Line1 in: (Unconnected) */
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Line2 in: (Unconnected) */
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* PCBEEP */
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x40148605),
|
||||
|
||||
/* S/PDIF out: (Unconnected) */
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
0x01470740, /* Enable output for NID 0x14 (Speaker out) */
|
||||
0x015707C0, /* Enable output & HP amp for NID 0x15 (HP out) */
|
||||
|
@@ -10,13 +10,13 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x90a60140),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x90170110),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x03211020),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x03a11830),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x40138205),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
0x80862806, /* Codec Vendor / Device ID: Intel */
|
||||
0x80860101, /* Subsystem ID */
|
||||
|
@@ -31,19 +31,19 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x90a60140),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x90170110),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x03211020),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x03a11830),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
0x01970804,
|
||||
0x01870803,
|
||||
0x01470740,
|
||||
0x00970600,
|
||||
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x40138205),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Misc entries */
|
||||
0x00370600,
|
||||
|
@@ -12,11 +12,11 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x03211020),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x40008000),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x03a11030),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x40f38205),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
0x80862806, /* Codec Vendor / Device ID: Intel */
|
||||
0x80860101, /* Subsystem ID */
|
||||
|
@@ -34,16 +34,16 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x90170110),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x03211020),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x03a11830),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
0x01970804,
|
||||
0x01870803,
|
||||
0x01470740,
|
||||
0x00970600,
|
||||
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x40138205),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Misc entries */
|
||||
0x00370600,
|
||||
|
@@ -13,14 +13,14 @@ const u32 cim_verb_data[] = {
|
||||
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x01014010),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x99130120),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x16, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x01a19830),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x02a19831),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x0181303f),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x0221401f),
|
||||
AZALIA_PIN_CFG(0, 0x1c, 0x593301f0),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x4004c601),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
};
|
||||
|
||||
const u32 pc_beep_verbs[0] = {};
|
||||
|
@@ -10,13 +10,13 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x90a60140),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x90170110),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x03211020),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x03a11830),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x40138205),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
0x80862806, /* Codec Vendor / Device ID: Intel */
|
||||
0x80860101, /* Subsystem ID */
|
||||
|
@@ -35,10 +35,10 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x90170110),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x03211020),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x03a11830),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x40138205),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Misc entries */
|
||||
0x01970804,
|
||||
|
@@ -12,11 +12,11 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x03211020),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x40008000),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x03a11030),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x40f38205),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
0x80862806, /* Codec Vendor / Device ID: Intel */
|
||||
0x80860101, /* Subsystem ID */
|
||||
|
@@ -8,19 +8,19 @@ const u32 cim_verb_data[] = {
|
||||
15, /* Number of 4 dword sets */
|
||||
AZALIA_SUBVENDOR(0, 0x1462d817),
|
||||
AZALIA_PIN_CFG(0, 0x11, 0x4037c040),
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x01014010),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x15, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x16, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x01a19030),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x02a19040),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x0181303f),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x02214020),
|
||||
AZALIA_PIN_CFG(0, 0x1c, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1c, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x4025c603),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1f, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1f, AZALIA_PIN_CFG_NC(0)),
|
||||
};
|
||||
|
||||
const u32 pc_beep_verbs[0] = {};
|
||||
|
@@ -7,20 +7,20 @@ const u32 cim_verb_data[] = {
|
||||
0x14627707, /* Subsystem ID */
|
||||
15, /* Number of 4 dword sets */
|
||||
AZALIA_SUBVENDOR(0, 0x14627707),
|
||||
AZALIA_PIN_CFG(0, 0x11, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x11, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x01014410),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x01011412),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x01016411),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x01012414),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x01813c40),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x02a19c50),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x02214c20),
|
||||
AZALIA_PIN_CFG(0, 0x1c, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1c, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x01454130),
|
||||
AZALIA_PIN_CFG(0, 0x1f, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1f, AZALIA_PIN_CFG_NC(0)),
|
||||
};
|
||||
|
||||
const u32 pc_beep_verbs[0] = {};
|
||||
|
@@ -9,7 +9,7 @@ const u32 cim_verb_data[] = {
|
||||
15, /* Number of entries */
|
||||
AZALIA_SUBVENDOR(0, 0x14629d25),
|
||||
AZALIA_PIN_CFG(0, 0x11, 0x4037d540),
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x01014010),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x01011012),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x01016011),
|
||||
@@ -18,10 +18,10 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x02a19040),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x0181303f),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x02214020),
|
||||
AZALIA_PIN_CFG(0, 0x1c, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1c, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x402af66b),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1f, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1f, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Alderlake HDMI */
|
||||
0x80862815, /* Vendor ID */
|
||||
|
@@ -9,7 +9,7 @@ const u32 cim_verb_data[] = {
|
||||
15, /* Number of entries */
|
||||
AZALIA_SUBVENDOR(0, 0x14629e06),
|
||||
AZALIA_PIN_CFG(0, 0x11, 0x4037d540),
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x01014010),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x01011012),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x01016011),
|
||||
@@ -18,10 +18,10 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x02a19040),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x0181303f),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x02214020),
|
||||
AZALIA_PIN_CFG(0, 0x1c, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1c, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x402af66b),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1f, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1f, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* Alderlake HDMI */
|
||||
0x80862818, /* Vendor ID */
|
||||
|
@@ -8,19 +8,19 @@ const u32 cim_verb_data[] = {
|
||||
15, /* Number of 4 dword sets */
|
||||
AZALIA_SUBVENDOR(0, 0x10ec0662),
|
||||
AZALIA_PIN_CFG(0, 0x11, 0x40000000),
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x04214110),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x15, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x16, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x04a19120),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1c, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1c, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x40231105),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1f, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1f, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
0x8086280b, /* Codec Vendor / Device ID: Intel */
|
||||
0x80860101, /* Subsystem ID */
|
||||
|
@@ -12,13 +12,13 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_SUBVENDOR(0, 0x19910269),
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x40000000),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x90170110),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x04a11020),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x90a70130),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x40569d05),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x21, 0x0421101f),
|
||||
};
|
||||
|
||||
|
@@ -14,14 +14,14 @@ const u32 cim_verb_data[] = {
|
||||
|
||||
AZALIA_SUBVENDOR(0, 0x10ec0256),
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x90a60140), /* Front digital mic */
|
||||
AZALIA_PIN_CFG(0, 0x13, 0x411111f0), /* NC */
|
||||
AZALIA_PIN_CFG(0, 0x13, AZALIA_PIN_CFG_NC(0)), /* NC */
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x90170110), /* Internal speakers */
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x411111f0), /* NC */
|
||||
AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)), /* NC */
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x02a11030), /* Jack analog mic */
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0), /* NC */
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0), /* NC */
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x411111f0), /* NC */
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0), /* NC */
|
||||
AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)), /* NC */
|
||||
AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)), /* NC */
|
||||
AZALIA_PIN_CFG(0, 0x1d, AZALIA_PIN_CFG_NC(0)), /* NC */
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)), /* NC */
|
||||
AZALIA_PIN_CFG(0, 0x21, 0x02211020), /* Jack analog out */
|
||||
|
||||
/* Hidden SW reset */
|
||||
|
@@ -10,16 +10,16 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_RESET(0x1),
|
||||
|
||||
AZALIA_SUBVENDOR(0, 0x10ec0269),
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x411111f0), /* NC */
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x411111f0), /* NC */
|
||||
AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_CFG_NC(0)), /* NC */
|
||||
AZALIA_PIN_CFG(0, 0x14, AZALIA_PIN_CFG_NC(0)), /* NC */
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x02211010), /* Jack analog out */
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0), /* NC */
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)), /* NC */
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x02a11120), /* Jack analog mic, no presence detect */
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x411111f0), /* NC */
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0), /* NC */
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0), /* NC */
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x411111f0), /* NC */
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0), /* NC */
|
||||
AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)), /* NC */
|
||||
AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)), /* NC */
|
||||
AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)), /* NC */
|
||||
AZALIA_PIN_CFG(0, 0x1d, AZALIA_PIN_CFG_NC(0)), /* NC */
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)), /* NC */
|
||||
|
||||
0x8086280b, /* Codec Vendor/Device ID: Intel CannonPoint HDMI */
|
||||
0x80860101, /* Subsystem ID */
|
||||
|
@@ -14,11 +14,11 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x90170110), /* FRONT */
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x40000000), /* N/C */
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x04a11020), /* MIC1 */
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x411111f0), /* N/C */
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0), /* N/C */
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0), /* N/C */
|
||||
AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)), /* N/C */
|
||||
AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)), /* N/C */
|
||||
AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)), /* N/C */
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x40e38105), /* BEEP */
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0), /* N/C */
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)), /* N/C */
|
||||
AZALIA_PIN_CFG(0, 0x21, 0x0421101f), /* HP-OUT */
|
||||
|
||||
/* EQ */
|
||||
|
@@ -13,13 +13,13 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x40000000),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x90170110),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x04214020),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x04a19040),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x90a70130),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x40548505),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
};
|
||||
|
||||
const u32 pc_beep_verbs[] = {};
|
||||
|
@@ -11,13 +11,13 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x12, 0xb7a60140),
|
||||
AZALIA_PIN_CFG(0, 0x13, 0x40000000),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x90170110),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x03a11030),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x4075a505),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1f, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1f, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x21, 0x03211020),
|
||||
|
||||
/* Intel, Kaby Lake HDMI */
|
||||
|
@@ -11,13 +11,13 @@ const u32 cim_verb_data[] = {
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x90a60130),
|
||||
AZALIA_PIN_CFG(0, 0x13, 0x40000000),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x90170110),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x04a11040),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x4075812d),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1f, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x1f, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, 0x21, 0x04211020),
|
||||
|
||||
/* Intel, Kaby Lake HDMI */
|
||||
|
@@ -11,17 +11,17 @@ const u32 cim_verb_data[] = {
|
||||
/* Pin Widget Verb Table */
|
||||
|
||||
/* Pin Complex (NID 0x11), S/PDIF-OUT2: not connected */
|
||||
AZALIA_PIN_CFG(0, 0x11, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x11, AZALIA_PIN_CFG_NC(0)),
|
||||
/* Pin Complex (NID 0x14), LINE_OUT (port D): Speakers */
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x99130110),
|
||||
/* Pin Complex (NID 0x15), HP_OUT (port A): Head phones */
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x0121411f),
|
||||
/* Pin Complex (NID 0x16), MONO-OUT: not connected */
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x16, AZALIA_PIN_CFG_NC(0)),
|
||||
/* Pin Complex (NID 0x18), MIC1 (port B): Microphone */
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x01a19920),
|
||||
/* Pin Complex (NID 0x19), MIC2 (port F): not connected */
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)),
|
||||
/* Pin Complex (NID 0x1a), LINE1 (port C): Line-In */
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x01813121),
|
||||
/* Pin Complex (NID 0x1b), LINE2 (port E): MDC */
|
||||
@@ -31,9 +31,9 @@ const u32 cim_verb_data[] = {
|
||||
/* Pin Complex (NID 0x1d), PCBEEP */
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x4014022d),
|
||||
/* Pin Complex (NID 0x1e), S/PDIF-OUT: not connected */
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
/* Pin Complex (NID 0x1f), S/PDIF-IN: not connected */
|
||||
AZALIA_PIN_CFG(0, 0x1f, 0x411111f0)
|
||||
AZALIA_PIN_CFG(0, 0x1f, AZALIA_PIN_CFG_NC(0))
|
||||
};
|
||||
|
||||
const u32 pc_beep_verbs[] = {
|
||||
|
@@ -17,23 +17,23 @@ const u32 cim_verb_data[] = {
|
||||
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x01214020),
|
||||
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x16, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x01a19030),
|
||||
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
AZALIA_PIN_CFG(0, 0x1c, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1c, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x4036a235),
|
||||
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
AZALIA_PIN_CFG(0, 0x1f, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1f, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
/* coreboot specific header */
|
||||
0x80862806, /* Codec Vendor / Device ID: Intel PantherPoint HDMI */
|
||||
|
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user