mb/google/zork: Make SW changes for HP_INT_ODL in schematic v3.6

HP_INT_ODL is no longer connected to CODEC_GPI in schematic version 3.6.

Split variant_audio_update into update_dmic_gpio and update_hp_int_odl.
Changed GPIO_29 from PAD_NC to PAD_GPI in Trembyle. Changed GPIO_84 from
PAD_NC to PAD_GPI for Dalboz. Changed HP_INT_ODL to appropriate pin in
both boards devicetree.cb.

BUG=b:161938476
BRANCH=None
TEST=None

Cq-Depend: chromium:2335424
Change-Id: I05ffb063ab99823d07be6eaa911efbde3cc4ff55
Signed-off-by: Josie Nordrum <josienordrum@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44157
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Josie Nordrum 2020-08-03 11:39:41 -06:00 committed by Furquan Shaikh
parent c759e5e27a
commit cc72e15c26
5 changed files with 61 additions and 6 deletions

View File

@ -308,7 +308,7 @@ chip soc/amd/picasso
register "name" = ""RT58""
register "uid" = "1"
register "desc" = ""Realtek RT5682""
register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(62)"
register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPIO_84)"
register "property_count" = "2"
register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
register "property_list[0].name" = ""realtek,jd-src""

View File

@ -333,7 +333,7 @@ chip soc/amd/picasso
register "name" = ""RT58""
register "uid" = "1"
register "desc" = ""Realtek RT5682""
register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(62)"
register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPIO_29)"
register "property_count" = "2"
register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
register "property_list[0].name" = ""realtek,jd-src""

View File

@ -93,8 +93,8 @@ static const struct soc_amd_gpio gpio_set_stage_ram[] = {
/* EN_PWR_CAMERA */
PAD_GPO(GPIO_76, HIGH),
/* GPIO_77 - GPIO_83: Not available */
/* UNUSED */
PAD_NC(GPIO_84),
/* HP_INT_ODL */
PAD_GPI(GPIO_84, PULL_NONE),
/* APU_EDP_BL_DISABLE TODP: Set low in depthcharge */
PAD_GPO(GPIO_85, HIGH),
/* RAM ID 2 */

View File

@ -65,8 +65,8 @@ static const struct soc_amd_gpio gpio_set_stage_ram[] = {
/* PCIE_RST1_L (unused) */
PAD_NC(GPIO_27),
/* GPIO_28: Not available */
/* GPIO_29: unused */
PAD_NC(GPIO_29),
/* GPIO_29: HP_INT_ODL */
PAD_GPI(GPIO_29, PULL_NONE),
/* FCH_ESPI_EC_CS_L */
PAD_NF(GPIO_30, ESPI_CS_L, PULL_NONE),
/* EC_AP_INT_ODL (Sensor Framesync) */

View File

@ -5,12 +5,65 @@
#include <console/console.h>
#include <device/device.h>
#include <drivers/amd/i2s_machine_dev/chip.h>
#include <drivers/i2c/generic/chip.h>
#include <drivers/usb/acpi/chip.h>
#include <ec/google/chromeec/ec.h>
#include <soc/gpio.h>
#include <soc/pci_devs.h>
extern struct chip_operations drivers_amd_i2s_machine_dev_ops;
extern struct chip_operations drivers_i2c_generic_ops;
static void update_hp_int_odl(void)
{
static const struct device_path rt5682_path[] = {
{
.type = DEVICE_PATH_PCI,
.pci.devfn = LPC_DEVFN
},
{
.type = DEVICE_PATH_PNP,
.pnp.port = 0xc09,
.pnp.device = 0x0
},
{
.type = DEVICE_PATH_GENERIC,
.generic.id = 0,
.generic.subid = 0
},
{
.type = DEVICE_PATH_I2C,
.i2c.device = 0x1a
}
};
const struct device *rt5682_dev;
struct drivers_i2c_generic_config *cfg;
struct acpi_gpio *gpio;
if (!variant_uses_codec_gpi())
return;
rt5682_dev = find_dev_nested_path(
pci_root_bus(), rt5682_path, ARRAY_SIZE(rt5682_path));
if (!rt5682_dev) {
printk(BIOS_ERR, "%s: Failed to find audio device\n",
__func__);
return;
}
if (rt5682_dev->chip_ops != &drivers_i2c_generic_ops) {
printk(BIOS_ERR, "%s: Incorrect device found\n", __func__);
return;
}
cfg = config_of(rt5682_dev);
gpio = &cfg->irq_gpio;
gpio->pins[0] = 62;
}
void variant_audio_update(void)
{
@ -49,6 +102,8 @@ void variant_audio_update(void)
break;
}
update_hp_int_odl();
}
static const struct device_path xhci0_bt_path[] = {