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mb/google/drallion: Set cpu_pl2_4_cfg to baseline for Drallion

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Proper VR settings will be selected by CPU SKU and cpu_pl2_4_cfg.

BUG=b:148912093
BRANCH=None
TEST=build coreboot and checked IA_TDC from TAT tool.

Change-Id: Ie471dee0c70e1831a822860c0a44455772a2b8be
Signed-off-by: John Su <john_su@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38811
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Reviewed-by: Mathew King <mathewk@chromium.org>
This commit is contained in:
John Su 2020-02-10 13:59:27 +08:00 committed by Patrick Georgi
parent 99e54fece3
commit cdabc407cd
1 changed files with 3 additions and 0 deletions
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src/mainboard/google/drallion/variants/drallion/devicetree.cb
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@ -65,6 +65,9 @@ chip soc/intel/cannonlake
register "PchHdaIDispCodecDisconnect" = "1"
register "PchHdaAudioLinkHda" = "1"
# Select CPU PL2/PL4 config
register "cpu_pl2_4_cfg" = "baseline"
# VR Settings Configuration for 2/4 Domains
#+----------------+-------+-------+-------+-------+
#| Domain/Setting | SA | IA | GTUS | GTS |