mb/google/sarien: Make use of chipset dt reference names
Replace the PCI numbers with the reference names from the chipset devicetree. Also, remove their comments since they are superfluous now. Change-Id: I49f5fda5628b2ebc76cd8db20c8f7fe85c676c7a Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82157 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
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@ -209,16 +209,16 @@ chip soc/intel/cannonlake
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register "gpio_pm[COMM_4]" = "MISCCFG_GPIO_PM_CONFIG_BITS"
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device domain 0 on
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device pci 02.0 on end # Integrated Graphics Device
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device pci 04.0 on end # SA Thermal device
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device pci 12.0 on end # Thermal Subsystem
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device pci 13.0 on # Integrated Sensor Hub
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device ref igpu on end
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device ref dptf on end
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device ref thermal on end
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device ref ish on
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chip drivers/intel/ish
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register "firmware_name" = ""arcada_ish.bin""
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device generic 0 on end
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end
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end
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device pci 14.0 on
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device ref xhci on
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chip drivers/usb/acpi
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register "desc" = ""Root Hub""
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register "type" = "UPC_TYPE_HUB"
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@ -292,14 +292,14 @@ chip soc/intel/cannonlake
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end
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end
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end
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end # USB xHCI
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device pci 14.3 on
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end
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device ref cnvi_wifi on
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chip drivers/wifi/generic
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register "wake" = "PME_B0_EN_BIT"
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device generic 0 on end
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end
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end # CNVi wifi
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device pci 15.0 on
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end
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device ref i2c0 on
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chip drivers/i2c/hid
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register "generic.hid" = ""WCOM48E2""
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register "generic.desc" = ""Wacom Touchscreen""
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@ -313,8 +313,8 @@ chip soc/intel/cannonlake
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register "hid_desc_reg_offset" = "0x1"
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device i2c 0A on end
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end
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end # I2C #0
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device pci 15.1 on
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end
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device ref i2c1 on
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chip drivers/i2c/generic
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register "hid" = ""ELAN0000""
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register "desc" = ""ELAN Touchpad""
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@ -330,37 +330,38 @@ chip soc/intel/cannonlake
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register "hid_desc_reg_offset" = "0x20"
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device i2c 2a on end
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end
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end # I2C #1
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device pci 17.0 on end # SATA
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device pci 19.0 on
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end
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device ref sata on end
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device ref i2c4 on
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chip drivers/i2c/tpm
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register "hid" = ""GOOG0005""
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register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_D18_IRQ)"
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device i2c 50 on end
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end
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end # I2C #4
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device pci 19.2 on end # UART #2
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device pci 1d.1 on
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end
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device ref uart2 on end
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device ref pcie_rp10 on
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smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "2230" "SlotDataBusWidth1X"
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register "PcieRpSlotImplemented[9]" = "1"
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end # PCI Express Port 10
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device pci 1d.2 on # PCI Express Port 11
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end
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device ref pcie_rp11 on
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register "PcieRpSlotImplemented[10]" = "1"
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end
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device pci 1d.4 on
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device ref pcie_rp13 on
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# x4 lanes
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chip drivers/generic/bayhub
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register "power_saving" = "1"
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device pci 00.0 on end
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end
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smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "2280" "SlotDataBusWidth4X"
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register "PcieRpSlotImplemented[12]" = "1"
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end # PCI Express Port 13 (x4)
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device pci 1f.0 on
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end
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device ref lpc_espi on
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chip ec/google/wilco
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device pnp 0c09.0 on end
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end
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end # LPC/eSPI
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device pci 1f.3 on end # Intel HDA
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device pci 1f.4 on end # SMBus
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end
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device ref hda on end
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device ref smbus on end
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end
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end
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@ -214,10 +214,10 @@ chip soc/intel/cannonlake
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register "gpio_pm[COMM_4]" = "MISCCFG_GPIO_PM_CONFIG_BITS"
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device domain 0 on
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device pci 02.0 on end # Integrated Graphics Device
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device pci 04.0 on end # SA Thermal device
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device pci 12.0 on end # Thermal Subsystem
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device pci 14.0 on
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device ref igpu on end
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device ref dptf on end
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device ref thermal on end
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device ref xhci on
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chip drivers/usb/acpi
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register "desc" = ""Root Hub""
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register "type" = "UPC_TYPE_HUB"
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@ -303,14 +303,14 @@ chip soc/intel/cannonlake
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end
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end
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end
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end # USB xHCI
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device pci 14.3 on
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end
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device ref cnvi_wifi on
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chip drivers/wifi/generic
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register "wake" = "PME_B0_EN_BIT"
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device generic 0 on end
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end
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end # CNVi wifi
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device pci 15.0 on
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end
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device ref i2c0 on
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chip drivers/i2c/hid
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register "generic.hid" = ""ELAN900C""
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register "generic.desc" = ""ELAN Touchscreen""
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@ -342,8 +342,8 @@ chip soc/intel/cannonlake
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register "device_present_gpio_invert" = "1"
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device i2c 34 on end
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end
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end # I2C #0
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device pci 15.1 on
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end
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device ref i2c1 on
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chip drivers/i2c/generic
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register "hid" = ""ELAN0000""
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register "desc" = ""ELAN Touchpad""
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@ -351,48 +351,50 @@ chip soc/intel/cannonlake
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register "detect" = "1"
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device i2c 2c on end
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end
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end # I2C #1
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device pci 17.0 on end # SATA
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device pci 19.0 on
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end
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device ref sata on end
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device ref i2c4 on
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chip drivers/i2c/tpm
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register "hid" = ""GOOG0005""
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register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_D18_IRQ)"
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device i2c 50 on end
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end
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end # I2C #4
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device pci 19.2 on end # UART #2
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device pci 1c.0 on # PCI Express Port 1 (USB)
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end
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device ref uart2 on end
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device ref pcie_rp1 on
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# USB
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register "PcieRpSlotImplemented[0]" = "1"
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end
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device pci 1c.7 on # PCI Express Port 8
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device ref pcie_rp8 on
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register "PcieRpSlotImplemented[7]" = "1"
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end
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device pci 1d.0 on
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device ref pcie_rp9 on
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chip drivers/generic/bayhub
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register "power_saving" = "1"
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device pci 00.0 on end
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end
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smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "2230" "SlotDataBusWidth1X"
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register "PcieRpSlotImplemented[8]" = "1"
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end # PCI Express Port 9
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device pci 1d.1 on # PCI Express Port 10
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end
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device ref pcie_rp10 on
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register "PcieRpSlotImplemented[9]" = "1"
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end
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device pci 1d.4 on
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device ref pcie_rp13 on
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# x4 lanes
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chip drivers/generic/bayhub
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register "power_saving" = "1"
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device pci 00.0 on end
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end
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smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "2280" "SlotDataBusWidth4X"
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register "PcieRpSlotImplemented[12]" = "1"
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end # PCI Express Port 13 (x4)
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device pci 1f.0 on
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end
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device ref lpc_espi on
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chip ec/google/wilco
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device pnp 0c09.0 on end
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end
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end # LPC/eSPI
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device pci 1f.3 on end # Intel HDA
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device pci 1f.4 on end # SMBus
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device pci 1f.6 on end # GbE
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end
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device ref hda on end
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device ref smbus on end
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device ref gbe on end
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end
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end
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