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Allow TGL mixed topology to have mismatched SPD length

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Change-Id: I1a0d66ed580cf2f11c61500b801335500b35c603
This commit is contained in:
Jeremy Soller
2020-11-06 11:01:01 -07:00
parent 15436f7225
commit ce6bff58d2
1 changed files with 1 additions and 1 deletions
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src/soc/intel/tigerlake/meminit.c
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@@ -378,7 +378,7 @@ void meminit_ddr4(FSP_M_CONFIG *mem_cfg, const struct mb_ddr4_cfg *board_cfg,
read_sodimm_spd(info, &spd_sodimm_blk); read_sodimm_spd(info, &spd_sodimm_blk);
if ((info->topology == MIXED) && if ((info->topology == MIXED) &&
(mem_cfg->MemorySpdDataLen != spd_sodimm_blk.len)) (mem_cfg->MemorySpdDataLen != spd_sodimm_blk.len))
die("Mixed topology has incorrect length.\n"); printk(BIOS_ERR, "Mixed topology has incorrect length: %d != %d.\n", mem_cfg->MemorySpdDataLen, spd_sodimm_blk.len);
else else
mem_cfg->MemorySpdDataLen = spd_sodimm_blk.len; mem_cfg->MemorySpdDataLen = spd_sodimm_blk.len;
} }