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mb/google/brya/var/zydron: Use SSFC for mipi instead of fw_config

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Kano didn't use SSFC in mass production, however
Zydron needs SSFC for 2rd source mipi instead of fw_config.

BUG=b:262939431
TEST=Boot to OS and check functional with ov2740/hi556 camera.

Change-Id: Idb2a35d67af0b5a7dedc66b0f7eccd8a3b4612d1
Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70881
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Ren Kuo <ren.kuo@quanta.corp-partner.google.com>
This commit is contained in:
David Wu 2022-12-16 20:53:49 +08:00 committed by Martin L Roth
parent 716c8f0711
commit cedd4d14f4
3 changed files with 23 additions and 8 deletions
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1
src/mainboard/google/brya/Kconfig.name
View File

@ -300,6 +300,7 @@ config BOARD_GOOGLE_ZYDRON
select DRIVERS_INTEL_MIPI_CAMERA
select SOC_INTEL_COMMON_BLOCK_IPU
select CHROMEOS_WIFI_SAR if CHROMEOS
select EC_GOOGLE_CHROMEEC_INCLUDE_SSFC_IN_FW_CONFIG
config BOARD_GOOGLE_GLADIOS
bool "-> Gladios"

15
src/mainboard/google/brya/variants/kano/overridetree.cb
View File

@ -10,12 +10,16 @@ fw_config
field UFC 4 5
option UFC_USB 0
option UFC_MIPI_OVTI2740 1
option UFC_MIPI_HI556 2
option UFC_MIPI_ZYDRON 2
end
field STYLUS 6
option STYLUS_ABSENT 0
option STYLUS_PRESENT 1
end
field ZYDRON_UFC 36 37
option UFC_MIPI_HI556 0
option UFC_MIPI_OVTI2740 1
end
end
chip soc/intel/alderlake
register "sagv" = "SaGv_Enabled"
@ -198,7 +202,8 @@ chip soc/intel/alderlake
register "cio2_prt[0]" = "1"
device generic 0 on
probe UFC UFC_MIPI_OVTI2740
probe UFC UFC_MIPI_HI556
probe ZYDRON_UFC UFC_MIPI_HI556
probe ZYDRON_UFC UFC_MIPI_OVTI2740
end
end
end
@ -321,6 +326,7 @@ chip soc/intel/alderlake
device i2c 36 on
probe UFC UFC_MIPI_OVTI2740
probe ZYDRON_UFC UFC_MIPI_OVTI2740
end
end
chip drivers/intel/mipi_camera
@ -359,7 +365,7 @@ chip soc/intel/alderlake
register "off_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
device i2c 20 on
probe UFC UFC_MIPI_HI556
probe ZYDRON_UFC UFC_MIPI_HI556
end
end
chip drivers/intel/mipi_camera
@ -377,7 +383,8 @@ chip soc/intel/alderlake
device i2c 50 on
probe UFC UFC_MIPI_OVTI2740
probe UFC UFC_MIPI_HI556
probe ZYDRON_UFC UFC_MIPI_HI556
probe ZYDRON_UFC UFC_MIPI_OVTI2740
end
end
end

15
src/mainboard/google/brya/variants/zydron/overridetree.cb
View File

@ -10,12 +10,16 @@ fw_config
field UFC 4 5
option UFC_USB 0
option UFC_MIPI_OVTI2740 1
option UFC_MIPI_HI556 2
option UFC_MIPI_ZYDRON 2
end
field STYLUS 6
option STYLUS_ABSENT 0
option STYLUS_PRESENT 1
end
field ZYDRON_UFC 36 37
option UFC_MIPI_HI556 0
option UFC_MIPI_OVTI2740 1
end
end
chip soc/intel/alderlake
register "domain_vr_config[VR_DOMAIN_IA]" = "{
@ -202,7 +206,8 @@ chip soc/intel/alderlake
register "cio2_prt[0]" = "1"
device generic 0 on
probe UFC UFC_MIPI_OVTI2740
probe UFC UFC_MIPI_HI556
probe ZYDRON_UFC UFC_MIPI_HI556
probe ZYDRON_UFC UFC_MIPI_OVTI2740
end
end
end
@ -325,6 +330,7 @@ chip soc/intel/alderlake
device i2c 36 on
probe UFC UFC_MIPI_OVTI2740
probe ZYDRON_UFC UFC_MIPI_OVTI2740
end
end
chip drivers/intel/mipi_camera
@ -363,7 +369,7 @@ chip soc/intel/alderlake
register "off_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
device i2c 20 on
probe UFC UFC_MIPI_HI556
probe ZYDRON_UFC UFC_MIPI_HI556
end
end
chip drivers/intel/mipi_camera
@ -381,7 +387,8 @@ chip soc/intel/alderlake
device i2c 50 on
probe UFC UFC_MIPI_OVTI2740
probe UFC UFC_MIPI_HI556
probe ZYDRON_UFC UFC_MIPI_HI556
probe ZYDRON_UFC UFC_MIPI_OVTI2740
end
end
end