ACPI: Remove Kconfig COMMON_FADT
Also remove default mb/*/fadt.c from Makefiles. Change-Id: I6a2839c524f8311ec9a382a84066afc7d579eaca Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41948 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
committed by
Felix Held
parent
45ecd49eea
commit
cfc3c358b2
@@ -655,10 +655,6 @@ config HAVE_PIRQ_TABLE
|
||||
Whether or not the PIRQ table is actually generated by coreboot
|
||||
is configurable by the user via GENERATE_PIRQ_TABLE.
|
||||
|
||||
config COMMON_FADT
|
||||
bool
|
||||
default n
|
||||
|
||||
config ACPI_NHLT
|
||||
bool
|
||||
default n
|
||||
|
@@ -16,8 +16,5 @@ ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/acpi_tables.c),)
|
||||
ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/acpi_tables.c
|
||||
endif
|
||||
$(eval $(call asl_template,dsdt))
|
||||
ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/fadt.c),)
|
||||
ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/fadt.c
|
||||
endif
|
||||
|
||||
endif # CONFIG_GENERATE_ACPI_TABLES
|
||||
endif # CONFIG_HAVE_ACPI_TABLES
|
||||
|
@@ -1219,8 +1219,6 @@ void acpi_write_bert(acpi_bert_t *bert, uintptr_t region, size_t length)
|
||||
header->checksum = acpi_checksum((void *)bert, header->length);
|
||||
}
|
||||
|
||||
#if CONFIG(COMMON_FADT)
|
||||
|
||||
__weak void soc_fill_fadt(acpi_fadt_t *fadt) { }
|
||||
__weak void mainboard_fill_fadt(acpi_fadt_t *fadt) { }
|
||||
|
||||
@@ -1269,7 +1267,6 @@ void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt)
|
||||
header->checksum =
|
||||
acpi_checksum((void *) fadt, header->length);
|
||||
}
|
||||
#endif
|
||||
|
||||
unsigned long __weak fw_cfg_acpi_tables(unsigned long start)
|
||||
{
|
||||
|
@@ -55,7 +55,6 @@ config CPU_SPECIFIC_OPTIONS
|
||||
select UDK_2017_BINDING
|
||||
select CACHE_MRC_SETTINGS
|
||||
select HAVE_CF9_RESET
|
||||
select COMMON_FADT
|
||||
|
||||
config PRERAM_CBMEM_CONSOLE_SIZE
|
||||
hex
|
||||
|
@@ -46,7 +46,6 @@ config CPU_SPECIFIC_OPTIONS
|
||||
select HAVE_SMI_HANDLER
|
||||
select SSE2
|
||||
select RTC
|
||||
select COMMON_FADT
|
||||
|
||||
config AMD_APU_STONEYRIDGE
|
||||
bool
|
||||
|
@@ -39,7 +39,6 @@ config CPU_SPECIFIC_OPTIONS
|
||||
select SOC_INTEL_COMMON_NHLT
|
||||
# Misc options
|
||||
select CACHE_MRC_SETTINGS
|
||||
select COMMON_FADT
|
||||
select FSP_PLATFORM_MEMORY_SETTINGS_VERSIONS
|
||||
select GENERIC_GPIO_LIB
|
||||
select INTEL_DESCRIPTOR_MODE_CAPABLE
|
||||
|
@@ -14,7 +14,6 @@ config CPU_SPECIFIC_OPTIONS
|
||||
select ARCH_RAMSTAGE_X86_32
|
||||
select BOOT_DEVICE_SUPPORTS_WRITES
|
||||
select CACHE_MRC_SETTINGS
|
||||
select COMMON_FADT
|
||||
select CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED
|
||||
select SUPPORT_CPU_UCODE_IN_CBFS
|
||||
select HAVE_SMI_HANDLER
|
||||
|
@@ -15,7 +15,6 @@ config CPU_SPECIFIC_OPTIONS
|
||||
select BOOT_DEVICE_SUPPORTS_WRITES
|
||||
select CACHE_MRC_SETTINGS
|
||||
select SUPPORT_CPU_UCODE_IN_CBFS
|
||||
select COMMON_FADT
|
||||
select CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED
|
||||
select HAVE_SMI_HANDLER
|
||||
select NO_FIXED_XIP_ROM_SIZE
|
||||
|
@@ -15,7 +15,6 @@ config CPU_SPECIFIC_OPTIONS
|
||||
select BOOT_DEVICE_SUPPORTS_WRITES
|
||||
select CACHE_MRC_SETTINGS
|
||||
select MRC_SETTINGS_PROTECT
|
||||
select COMMON_FADT
|
||||
select CPU_INTEL_COMMON
|
||||
select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
|
||||
select SUPPORT_CPU_UCODE_IN_CBFS
|
||||
|
@@ -65,7 +65,6 @@ config CPU_SPECIFIC_OPTIONS
|
||||
select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH
|
||||
select BOOT_DEVICE_SUPPORTS_WRITES
|
||||
select CACHE_MRC_SETTINGS
|
||||
select COMMON_FADT
|
||||
select CPU_INTEL_COMMON
|
||||
select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
|
||||
select FSP_M_XIP
|
||||
|
@@ -27,7 +27,6 @@ config CPU_SPECIFIC_OPTIONS
|
||||
select PCR_COMMON_IOSF_1_0
|
||||
select SMP
|
||||
select INTEL_DESCRIPTOR_MODE_CAPABLE
|
||||
select COMMON_FADT
|
||||
select SOC_INTEL_COMMON_BLOCK
|
||||
select SOC_INTEL_COMMON_BLOCK_CPU
|
||||
select SOC_INTEL_COMMON_BLOCK_ACPI
|
||||
|
@@ -15,7 +15,6 @@ config CPU_SPECIFIC_OPTIONS
|
||||
select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH
|
||||
select BOOT_DEVICE_SUPPORTS_WRITES
|
||||
select CACHE_MRC_SETTINGS
|
||||
select COMMON_FADT
|
||||
select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
|
||||
select FSP_M_XIP
|
||||
select GENERIC_GPIO_LIB
|
||||
|
@@ -15,7 +15,6 @@ config CPU_SPECIFIC_OPTIONS
|
||||
select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH
|
||||
select BOOT_DEVICE_SUPPORTS_WRITES
|
||||
select CACHE_MRC_SETTINGS
|
||||
select COMMON_FADT
|
||||
select CPU_INTEL_COMMON
|
||||
select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
|
||||
select FSP_M_XIP
|
||||
|
@@ -26,7 +26,6 @@ config CPU_SPECIFIC_OPTIONS
|
||||
select UNCOMPRESSED_RAMSTAGE
|
||||
select USE_MARCH_586
|
||||
select NO_SMM
|
||||
select COMMON_FADT
|
||||
|
||||
#####
|
||||
# Debug serial output
|
||||
|
@@ -26,7 +26,6 @@ config CPU_SPECIFIC_OPTIONS
|
||||
select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH
|
||||
select BOOT_DEVICE_SUPPORTS_WRITES
|
||||
select CACHE_MRC_SETTINGS
|
||||
select COMMON_FADT
|
||||
select CPU_INTEL_COMMON
|
||||
select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
|
||||
select CPU_INTEL_COMMON_HYPERTHREADING
|
||||
|
@@ -15,7 +15,6 @@ config CPU_SPECIFIC_OPTIONS
|
||||
select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH
|
||||
select BOOT_DEVICE_SUPPORTS_WRITES
|
||||
select CACHE_MRC_SETTINGS
|
||||
select COMMON_FADT
|
||||
select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
|
||||
select FSP_M_XIP
|
||||
select GENERIC_GPIO_LIB
|
||||
|
@@ -40,7 +40,6 @@ config CPU_SPECIFIC_OPTIONS
|
||||
select PARALLEL_MP
|
||||
select SMP
|
||||
select INTEL_DESCRIPTOR_MODE_CAPABLE
|
||||
select COMMON_FADT
|
||||
select SOC_INTEL_COMMON_BLOCK
|
||||
select SOC_INTEL_COMMON_BLOCK_CPU
|
||||
select SOC_INTEL_COMMON_BLOCK_TIMER
|
||||
|
@@ -14,7 +14,6 @@ config SOUTHBRIDGE_SPECIFIC_OPTIONS # dummy
|
||||
select HAVE_USBDEBUG_OPTIONS
|
||||
select HAVE_CF9_RESET
|
||||
select HAVE_CF9_RESET_PREPARE
|
||||
select COMMON_FADT
|
||||
select SOC_AMD_COMMON
|
||||
select SOC_AMD_COMMON_BLOCK
|
||||
select SOC_AMD_COMMON_BLOCK_ACPIMMIO
|
||||
|
@@ -8,7 +8,6 @@ config SOUTHBRIDGE_AMD_CIMX_SB800
|
||||
select AMD_SB_CIMX
|
||||
select HAVE_CF9_RESET
|
||||
select HAVE_CF9_RESET_PREPARE
|
||||
select COMMON_FADT
|
||||
select SOC_AMD_COMMON
|
||||
select SOC_AMD_COMMON_BLOCK
|
||||
select SOC_AMD_COMMON_BLOCK_ACPIMMIO
|
||||
|
@@ -17,7 +17,6 @@ config SOUTHBRIDGE_SPECIFIC_OPTIONS # dummy
|
||||
select HAVE_USBDEBUG_OPTIONS
|
||||
select HAVE_CF9_RESET
|
||||
select HAVE_CF9_RESET_PREPARE
|
||||
select COMMON_FADT
|
||||
select SOC_AMD_COMMON
|
||||
select SOC_AMD_COMMON_BLOCK
|
||||
select SOC_AMD_COMMON_BLOCK_ACPIMMIO
|
||||
|
@@ -25,7 +25,6 @@ config SOUTH_BRIDGE_OPTIONS # dummy
|
||||
select USE_WATCHDOG_ON_BOOT
|
||||
select PCIEXP_ASPM
|
||||
select PCIEXP_COMMON_CLOCK
|
||||
select COMMON_FADT
|
||||
select INTEL_DESCRIPTOR_MODE_CAPABLE
|
||||
select SOUTHBRIDGE_INTEL_COMMON_GPIO
|
||||
select RTC
|
||||
|
@@ -1,6 +1,5 @@
|
||||
config SOUTHBRIDGE_INTEL_I82371EB
|
||||
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
|
||||
select COMMON_FADT
|
||||
select SOUTHBRIDGE_INTEL_COMMON_SMBUS
|
||||
select SOUTHBRIDGE_INTEL_COMMON_RTC
|
||||
select SOUTHBRIDGE_INTEL_COMMON_RESET
|
||||
|
@@ -3,7 +3,6 @@
|
||||
config SOUTHBRIDGE_INTEL_I82801DX
|
||||
bool
|
||||
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
|
||||
select COMMON_FADT
|
||||
select IOAPIC
|
||||
select HAVE_SMI_HANDLER
|
||||
select SOUTHBRIDGE_INTEL_COMMON_SMBUS
|
||||
|
@@ -6,7 +6,6 @@ config SOUTHBRIDGE_INTEL_I82801GX
|
||||
select IOAPIC
|
||||
select USE_WATCHDOG_ON_BOOT
|
||||
select HAVE_SMI_HANDLER
|
||||
select COMMON_FADT
|
||||
select SOUTHBRIDGE_INTEL_COMMON_GPIO
|
||||
select SOUTHBRIDGE_INTEL_COMMON_SMBUS
|
||||
select SOUTHBRIDGE_INTEL_COMMON_SPI_ICH7 if BOOT_DEVICE_SPI_FLASH
|
||||
|
@@ -8,7 +8,6 @@ config SOUTHBRIDGE_INTEL_I82801IX
|
||||
select SOUTHBRIDGE_INTEL_COMMON_PMBASE
|
||||
select SOUTHBRIDGE_INTEL_COMMON_RTC
|
||||
select SOUTHBRIDGE_INTEL_COMMON_RESET
|
||||
select COMMON_FADT
|
||||
select IOAPIC
|
||||
select USE_WATCHDOG_ON_BOOT
|
||||
select HAVE_SMI_HANDLER
|
||||
|
@@ -15,7 +15,6 @@ config SOUTHBRIDGE_INTEL_I82801JX
|
||||
select HAVE_USBDEBUG_OPTIONS
|
||||
select SOUTHBRIDGE_INTEL_COMMON_GPIO
|
||||
select INTEL_DESCRIPTOR_MODE_CAPABLE
|
||||
select COMMON_FADT
|
||||
select SOUTHBRIDGE_INTEL_COMMON_SMM
|
||||
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
|
||||
select HAVE_POWER_STATE_AFTER_FAILURE
|
||||
|
@@ -23,7 +23,6 @@ config SOUTH_BRIDGE_OPTIONS # dummy
|
||||
select SOUTHBRIDGE_INTEL_COMMON_RTC
|
||||
select SOUTHBRIDGE_INTEL_COMMON_RESET
|
||||
select HAVE_USBDEBUG_OPTIONS
|
||||
select COMMON_FADT
|
||||
select INTEL_DESCRIPTOR_MODE_CAPABLE
|
||||
select SOUTHBRIDGE_INTEL_COMMON_GPIO
|
||||
select HAVE_INTEL_CHIPSET_LOCKDOWN
|
||||
|
@@ -28,7 +28,6 @@ config SOUTH_BRIDGE_OPTIONS # dummy
|
||||
select SOUTHBRIDGE_INTEL_COMMON_GPIO if !INTEL_LYNXPOINT_LP
|
||||
select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ
|
||||
select HAVE_INTEL_CHIPSET_LOCKDOWN
|
||||
select COMMON_FADT
|
||||
select HAVE_POWER_STATE_AFTER_FAILURE
|
||||
select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE
|
||||
select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG
|
||||
|
Reference in New Issue
Block a user