AMD Rev F support

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2435 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Yinghai Lu
2006-10-04 20:46:15 +00:00
parent 2e3757d11c
commit d4b278c02c
130 changed files with 11668 additions and 657 deletions

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@@ -48,14 +48,14 @@ struct bus {
device_t children; /* devices behind this bridge */
unsigned bridge_ctrl; /* Bridge control register */
unsigned char link; /* The index of this link */
unsigned char secondary; /* secondary bus number */
unsigned char subordinate; /* max subordinate bus number */
uint16_t secondary; /* secondary bus number */
uint16_t subordinate; /* max subordinate bus number */
unsigned char cap; /* PCi capability offset */
unsigned reset_needed : 1;
unsigned disable_relaxed_ordering : 1;
};
#define MAX_RESOURCES 12
#define MAX_RESOURCES 12
#define MAX_LINKS 8
/*
* There is one device structure for each slot-number/function-number

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@@ -11,6 +11,11 @@
#define HT_FREQ_1200Mhz 7
#define HT_FREQ_1400Mhz 8
#define HT_FREQ_1600Mhz 9
#define HT_FREQ_1800Mhz 10
#define HT_FREQ_2000Mhz 11
#define HT_FREQ_2200Mhz 12
#define HT_FREQ_2400Mhz 13
#define HT_FREQ_2600Mhz 14
#define HT_FREQ_VENDOR 15 /* AMD defines this to be 100Mhz */
#endif /* DEVICE_HYPERTRANSPORT_DEF_H */

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@@ -29,12 +29,12 @@ struct pci_operations {
/* Common pci bus operations */
struct pci_bus_operations {
uint8_t (*read8) (struct bus *pbus, unsigned char bus, int devfn, int where);
uint16_t (*read16) (struct bus *pbus, unsigned char bus, int devfn, int where);
uint32_t (*read32) (struct bus *pbus, unsigned char bus, int devfn, int where);
void (*write8) (struct bus *pbus, unsigned char bus, int devfn, int where, uint8_t val);
void (*write16) (struct bus *pbus, unsigned char bus, int devfn, int where, uint16_t val);
void (*write32) (struct bus *pbus, unsigned char bus, int devfn, int where, uint32_t val);
uint8_t (*read8) (struct bus *pbus, int bus, int devfn, int where);
uint16_t (*read16) (struct bus *pbus, int bus, int devfn, int where);
uint32_t (*read32) (struct bus *pbus, int bus, int devfn, int where);
void (*write8) (struct bus *pbus, int bus, int devfn, int where, uint8_t val);
void (*write16) (struct bus *pbus, int bus, int devfn, int where, uint16_t val);
void (*write32) (struct bus *pbus, int bus, int devfn, int where, uint32_t val);
};
struct pci_driver {

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@@ -201,6 +201,7 @@
#define PCI_HT_CAP_SLAVE_FREQ1 0x011 /* Slave frequency to */
#define PCI_HT_CAP_SLAVE_FREQ_CAP0 0x0e /* Frequency capability from */
#define PCI_HT_CAP_SLAVE_FREQ_CAP1 0x12 /* Frequency capability to */
#define PCI_HT_CAP_SLAVE_LINK_ENUM 0x14 /* Link Enumeration Scratchpad */
/* Power Management Registers */