AMD Rev F support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2435 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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		@@ -48,14 +48,14 @@ struct bus {
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	device_t 	children;	/* devices behind this bridge */
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	unsigned	bridge_ctrl;	/* Bridge control register */
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	unsigned char	link;		/* The index of this link */
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	unsigned char	secondary; 	/* secondary bus number */
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	unsigned char	subordinate;	/* max subordinate bus number */
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	uint16_t	secondary; 	/* secondary bus number */
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	uint16_t	subordinate;	/* max subordinate bus number */
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	unsigned char   cap;		/* PCi capability offset */
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	unsigned	reset_needed : 1;
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	unsigned	disable_relaxed_ordering : 1;
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};
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#define MAX_RESOURCES 12
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#define MAX_RESOURCES 12 
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#define MAX_LINKS    8 
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/*
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 * There is one device structure for each slot-number/function-number
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@@ -11,6 +11,11 @@
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#define HT_FREQ_1200Mhz  7
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#define HT_FREQ_1400Mhz  8
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#define HT_FREQ_1600Mhz  9
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#define HT_FREQ_1800Mhz 10 
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#define HT_FREQ_2000Mhz 11
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#define HT_FREQ_2200Mhz 12
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#define HT_FREQ_2400Mhz 13
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#define HT_FREQ_2600Mhz 14
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#define HT_FREQ_VENDOR  15  /* AMD defines this to be 100Mhz */
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#endif /* DEVICE_HYPERTRANSPORT_DEF_H */
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@@ -29,12 +29,12 @@ struct pci_operations {
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/* Common pci bus operations */
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struct pci_bus_operations {
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	uint8_t (*read8)   (struct bus *pbus, unsigned char bus, int devfn, int where);
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	uint16_t (*read16) (struct bus *pbus, unsigned char bus, int devfn, int where);
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	uint32_t (*read32) (struct bus *pbus, unsigned char bus, int devfn, int where);
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	void (*write8)  (struct bus *pbus, unsigned char bus, int devfn, int where, uint8_t val);
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	void (*write16) (struct bus *pbus, unsigned char bus, int devfn, int where, uint16_t val);
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	void (*write32) (struct bus *pbus, unsigned char bus, int devfn, int where, uint32_t val);
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	uint8_t (*read8)   (struct bus *pbus, int bus, int devfn, int where);
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	uint16_t (*read16) (struct bus *pbus, int bus, int devfn, int where);
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	uint32_t (*read32) (struct bus *pbus, int bus, int devfn, int where);
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	void (*write8)  (struct bus *pbus, int bus, int devfn, int where, uint8_t val);
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	void (*write16) (struct bus *pbus, int bus, int devfn, int where, uint16_t val);
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	void (*write32) (struct bus *pbus, int bus, int devfn, int where, uint32_t val);
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};
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struct pci_driver {
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@@ -201,6 +201,7 @@
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#define PCI_HT_CAP_SLAVE_FREQ1	   0x011	/* Slave frequency to */
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#define PCI_HT_CAP_SLAVE_FREQ_CAP0 0x0e	/* Frequency capability from */
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#define PCI_HT_CAP_SLAVE_FREQ_CAP1 0x12	/* Frequency capability to */
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#define PCI_HT_CAP_SLAVE_LINK_ENUM   0x14 /* Link Enumeration Scratchpad */
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/* Power Management Registers */
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