mb/google/brya/var/trulo: Add minimal devicetree entries to boot
This patch adds minimal device entries and chip configs for Trulo overridetree.cb to boot. BUG=b:351976770 TEST=Builds successfully for google/trulo. Change-Id: Ic8b90dbaaabb439c347a891650d255948d48810a Signed-off-by: Subrata Banik <subratabanik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83546 Reviewed-by: Eric Lai <ericllai@google.com> Reviewed-by: Dinesh Gehlot <digehlot@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@@ -1,8 +1,32 @@
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chip soc/intel/alderlake
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register "sagv" = "SaGv_Enabled"
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# GPE configuration
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register "pmc_gpe0_dw1" = "GPP_B"
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register "pmc_gpe0_dw2" = "GPP_F"
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# S0ix enable
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register "s0ix_enable" = "1"
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register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC1)" # USB3/2 Type A port A0
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register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC2)" # USB3/2 Type A port A1
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device domain 0 on
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end
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device domain 0 on
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device ref igpu on end
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device ref shared_sram on end
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device ref heci1 on end
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device ref emmc on end
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device ref ish on
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chip drivers/intel/ish
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register "add_acpi_dma_property" = "true"
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device generic 0 on end
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end
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end
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device ref ufs on end
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device ref pch_espi on
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chip ec/google/chromeec
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device pnp 0c09.0 on end
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end
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end
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end
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end
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