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soc/intel/common: Bring DISPLAY_MTRRS into the light

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Initially, I wanted to move only the Kconfig DISPLAY_MTRRS into the
"Debug" menu. It turned out, though, that the code looks rather generic.
No need to hide it in soc/intel/.

To not bloat src/Kconfig up any further, start a new `Kconfig.debug`
hierarchy just for debug options.

If somebody wants to review the code if it's 100% generic, we could
even get rid of HAVE_DISPLAY_MTRRS.

Change-Id: Ibd0a64121bd6e4ab5d7fd835f3ac25d3f5011f24
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/29684
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Nico Huber
2018-11-13 19:28:07 +01:00
committed by Patrick Georgi
parent 3032d76778
commit d67edcae6e
27 changed files with 105 additions and 167 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/drivers/intel/fsp1_1/after_raminit.S
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@ -66,7 +66,7 @@
1:
#endif
/* Display the MTRRs */
call soc_display_mtrrs
call display_mtrrs
/*
* The stack contents are initialized in src/soc/intel/common/stack.c

4
src/drivers/intel/fsp1_1/car.c
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@ -15,10 +15,10 @@
#include <arch/early_variables.h>
#include <console/console.h>
#include <cpu/x86/mtrr.h>
#include <fsp/car.h>
#include <fsp/util.h>
#include <program_loading.h>
#include <soc/intel/common/util.h>
#include <timestamp.h>
FSP_INFO_HEADER *fih_car CAR_GLOBAL;
@ -95,7 +95,7 @@ asmlinkage void after_cache_as_ram(void *chipset_context)
{
timestamp_add_now(TS_FSP_TEMP_RAM_EXIT_END);
printk(BIOS_DEBUG, "FspTempRamExit returned successfully\n");
soc_display_mtrrs();
display_mtrrs();
after_cache_as_ram_stage();
}

1
src/drivers/intel/fsp1_1/include/fsp/ramstage.h
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@ -18,7 +18,6 @@
#define _INTEL_COMMON_RAMSTAGE_H_
#include <fsp/util.h>
#include <soc/intel/common/util.h>
#include <stdint.h>
/*

1
src/drivers/intel/fsp1_1/include/fsp/romstage.h
View File

@ -22,7 +22,6 @@
#include <memory_info.h>
#include <fsp/car.h>
#include <fsp/util.h>
#include <soc/intel/common/util.h>
#include <soc/intel/common/mma.h>
#include <soc/pei_wrapper.h>
#include <soc/pm.h> /* chip_power_state */

4
src/drivers/intel/fsp1_1/stack.c
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@ -38,12 +38,12 @@ void *setup_stack_and_mtrrs(void)
uint32_t *slot;
/* Display the MTRRs */
soc_display_mtrrs();
display_mtrrs();
/* Top of stack needs to be aligned to a 8-byte boundary. */
slot = (void *)romstage_ram_stack_top();
num_mtrrs = 0;
max_mtrrs = soc_get_variable_mtrr_count(NULL);
max_mtrrs = get_var_mtrr_count();
/*
* The upper bits of the MTRR mask need to set according to the number

22
src/drivers/intel/fsp2_0/debug.c
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@ -11,8 +11,8 @@
#include <console/console.h>
#include <console/streams.h>
#include <cpu/x86/mtrr.h>
#include <fsp/util.h>
#include <soc/intel/common/util.h>
asmlinkage size_t fsp_write_line(uint8_t *buffer, size_t number_of_bytes)
{
@ -28,9 +28,7 @@ void fsp_debug_before_memory_init(fsp_memory_init_fn memory_init,
const FSPM_UPD *fspm_old_upd,
const FSPM_UPD *fspm_new_upd)
{
/* Display the MTRRs */
if (IS_ENABLED(CONFIG_DISPLAY_MTRRS))
soc_display_mtrrs();
display_mtrrs();
/* Display the UPD values */
if (IS_ENABLED(CONFIG_DISPLAY_UPD_DATA))
@ -62,9 +60,7 @@ void fsp_debug_after_memory_init(uint32_t status)
if (IS_ENABLED(CONFIG_VERIFY_HOBS))
fsp_verify_memory_init_hobs();
/* Display the MTRRs */
if (IS_ENABLED(CONFIG_DISPLAY_MTRRS))
soc_display_mtrrs();
display_mtrrs();
}
/*-----------
@ -75,9 +71,7 @@ void fsp_debug_before_silicon_init(fsp_silicon_init_fn silicon_init,
const FSPS_UPD *fsps_old_upd,
const FSPS_UPD *fsps_new_upd)
{
/* Display the MTRRs */
if (IS_ENABLED(CONFIG_DISPLAY_MTRRS))
soc_display_mtrrs();
display_mtrrs();
/* Display the UPD values */
if (IS_ENABLED(CONFIG_DISPLAY_UPD_DATA))
@ -99,9 +93,7 @@ void fsp_debug_after_silicon_init(uint32_t status)
if (IS_ENABLED(CONFIG_DISPLAY_HOBS))
fsp_display_hobs();
/* Display the MTRRs */
if (IS_ENABLED(CONFIG_DISPLAY_MTRRS))
soc_display_mtrrs();
display_mtrrs();
}
/*-----------
@ -129,7 +121,5 @@ void fsp_debug_after_notify(uint32_t status)
if (IS_ENABLED(CONFIG_DISPLAY_HOBS))
fsp_display_hobs();
/* Display the MTRRs */
if (IS_ENABLED(CONFIG_DISPLAY_MTRRS))
soc_display_mtrrs();
display_mtrrs();
}

6
src/drivers/intel/fsp2_0/notify.c
View File

@ -12,8 +12,8 @@
#include <bootstate.h>
#include <console/console.h>
#include <cpu/x86/mtrr.h>
#include <fsp/util.h>
#include <soc/intel/common/util.h>
#include <string.h>
#include <timestamp.h>
@ -70,9 +70,7 @@ static void fsp_notify_dummy(void *arg)
{
enum fsp_notify_phase phase = (uint32_t)arg;
/* Display the MTRRs */
if (IS_ENABLED(CONFIG_DISPLAY_MTRRS))
soc_display_mtrrs();
display_mtrrs();
fsp_notify(phase);
if (phase == READY_TO_BOOT)