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mb/google/brya/acpi: Remove erroneous _PR0/_PR3

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The Linux kernel runtime D3 framework expects a PCIe device to have a
power resource in order to be properly power-manageable. The _PR0/_PR3
values were pointing at the PEG0 Device, which is not a PowerResource,
so this must have confused the RTD3 framework and RTD3 was not
functional. Removing the _PR0/_PR3 fixes the problem.

BUG=b:243888246
TEST=echo auto > /sys/bus/pci/devices/0000:01:00.0/power/control;
sleep 10;
echo on > /sys/bus/pci/devices/0000:01:00.0/power/control
After this there are no longer errors seen in dmesg about failing
to place the device into D0.

Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: I83fa1e5fabd3257b097c10e7a13c9861872685ea
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67212
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Cliff Huang <cliff.huang@intel.com>
Reviewed-by: Tarun Tuli <taruntuli@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
This commit is contained in:
Tim Wawrzynczak 2022-08-30 12:50:46 -06:00 committed by Felix Held
parent 63aca9233b
commit d6ac209c74
3 changed files with 9 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/mainboard/google/brya/acpi/nvjt.asl
View File

@ -69,7 +69,7 @@ Method (NVJT, 2, Serialized)
/* Get GCU GCx Sleep Status */ /* Get GCU GCx Sleep Status */
Case (NVJT_GPC_GSS) Case (NVJT_GPC_GSS)
{ {
If (^_STA () != 0) If (PSTA () != 0)
{ {
CGPS = 1 CGPS = 1
CGCS = 1 CGCS = 1

2
src/mainboard/google/brya/acpi/nvop.asl
View File

@ -36,7 +36,7 @@ Method (NVOP, 2, Serialized)
} }
/* Current GPU Control Status */ /* Current GPU Control Status */
If (\_SB.PCI0.PEG0.PGPR._STA == 1) If (PSTA () == 1)
{ {
Local0 = 3 Local0 = 3
} }

17
src/mainboard/google/brya/acpi/power.asl
View File

@ -405,23 +405,20 @@ Method (_PS3, 0, NotSerialized)
} }
} }
/* Method (PSTA, 0, Serialized)
* Normally, _ON and _OFF of the power resources listed in _PRx will be
* evaluated before entering D0/D3. However, for Optimus, the package
* should refer to the PCIe controller itself, not a dependent device.
*/
Name (_PR0, Package() { \_SB.PCI0.PEG0 })
Name (_PR3, Package() { \_SB.PCI0.PEG0 })
Method (_STA, 0, Serialized)
{ {
If (GC6E == GC6_STATE_EXITED && If (GC6E == GC6_STATE_EXITED &&
\_SB.PCI0.GTXS(GPIO_GPU_ALLRAILS_PG) == 1) \_SB.PCI0.GTXS(GPIO_GPU_ALLRAILS_PG) == 1)
{ {
Return (0xF) Return (1)
} }
Else Else
{ {
Return (0) Return (0)
} }
} }
Method (_STA, 0, Serialized)
{
Return (0xF)
}