Fix ROM stage

Change-Id: Iede1a99d7a40e236c8cf9a89f652e23adb2289ed
This commit is contained in:
Jeremy Soller
2020-10-14 20:13:50 -06:00
parent 43da0a5d6e
commit d811be0127

View File

@@ -6,19 +6,10 @@
//TODO: verify values
static const struct mb_ddr4_cfg board_cfg = {
.dq_map[0] = {
{0x0F, 0xF0}, {0x00, 0xF0}, {0x0F, 0xF0},
//{0x0F, 0x00}, {0xFF, 0x00}, {0xFF, 0x00}
},
.dq_map[1] = {
{0x33, 0xCC}, {0x00, 0xCC}, {0x33, 0xCC},
//{0x33, 0x00}, {0xFF, 0x00}, {0xFF, 0x00}
},
// dq_map unused on DDR4
// dqs_map unused on DDR4
.dqs_map[0] = {7, 6, 5, 4, 1, 0, 3, 2},
.dqs_map[1] = {5, 4, 7, 6, 1, 0, 3, 2},
.dq_pins_interleaved = 1,
.dq_pins_interleaved = 0,
.ect = 0,
};