soc/intel/apollolake: Fix parenthesis issues
Fix the following errors and warning detected by checkpatch.pl:
ERROR: space required before the open parenthesis '('
ERROR: space prohibited before that close parenthesis ')'
ERROR: return is not a function, parentheses are not required
WARNING: space prohibited between function name and open parenthesis '('
TEST=Build for reef
Change-Id: I31f854adf3269ba6f77c4044fb3748bb1957841c
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/18725
Tested-by: build bot (Jenkins)
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Martin Roth <martinroth@google.com>
			
			
This commit is contained in:
		| @@ -287,7 +287,7 @@ static void acpigen_soc_get_dw0_in_local5(uintptr_t addr) | |||||||
|  |  | ||||||
| static int acpigen_soc_get_gpio_val(unsigned int gpio_num, uint32_t mask) | static int acpigen_soc_get_gpio_val(unsigned int gpio_num, uint32_t mask) | ||||||
| { | { | ||||||
| 	assert (gpio_num < TOTAL_PADS); | 	assert(gpio_num < TOTAL_PADS); | ||||||
| 	uintptr_t addr = (uintptr_t)gpio_dwx_address(gpio_num); | 	uintptr_t addr = (uintptr_t)gpio_dwx_address(gpio_num); | ||||||
|  |  | ||||||
| 	acpigen_soc_get_dw0_in_local5(addr); | 	acpigen_soc_get_dw0_in_local5(addr); | ||||||
| @@ -313,7 +313,7 @@ static int acpigen_soc_get_gpio_val(unsigned int gpio_num, uint32_t mask) | |||||||
|  |  | ||||||
| static int acpigen_soc_set_gpio_val(unsigned int gpio_num, uint32_t val) | static int acpigen_soc_set_gpio_val(unsigned int gpio_num, uint32_t val) | ||||||
| { | { | ||||||
| 	assert (gpio_num < TOTAL_PADS); | 	assert(gpio_num < TOTAL_PADS); | ||||||
| 	uintptr_t addr = (uintptr_t)gpio_dwx_address(gpio_num); | 	uintptr_t addr = (uintptr_t)gpio_dwx_address(gpio_num); | ||||||
|  |  | ||||||
| 	acpigen_soc_get_dw0_in_local5(addr); | 	acpigen_soc_get_dw0_in_local5(addr); | ||||||
|   | |||||||
| @@ -52,7 +52,7 @@ void platform_segment_loaded(uintptr_t start, size_t size, int flags) | |||||||
| 		return; | 		return; | ||||||
|  |  | ||||||
| 	/* Loaded program segment should lie entirely within CAR region. */ | 	/* Loaded program segment should lie entirely within CAR region. */ | ||||||
| 	assert (start_car_check && end_car_check); | 	assert(start_car_check && end_car_check); | ||||||
|  |  | ||||||
| 	flush_l1d_to_l2(); | 	flush_l1d_to_l2(); | ||||||
| } | } | ||||||
|   | |||||||
| @@ -49,7 +49,7 @@ static void pch_log_wake_source(struct chipset_power_state *ps) | |||||||
| 		elog_add_event_wake(ELOG_WAKE_SOURCE_PCIE, 0); | 		elog_add_event_wake(ELOG_WAKE_SOURCE_PCIE, 0); | ||||||
|  |  | ||||||
| 	/* PME */ | 	/* PME */ | ||||||
| 	if(ps->gpe0_sts[GPE0_A] & CSE_PME_STS) | 	if (ps->gpe0_sts[GPE0_A] & CSE_PME_STS) | ||||||
| 		elog_add_event_wake(ELOG_WAKE_SOURCE_PME, 0); | 		elog_add_event_wake(ELOG_WAKE_SOURCE_PME, 0); | ||||||
|  |  | ||||||
| 	/* SMBUS Wake */ | 	/* SMBUS Wake */ | ||||||
|   | |||||||
| @@ -143,7 +143,7 @@ static void gpi_enable_smi(const struct pad_config *cfg, uint16_t port, int pin) | |||||||
|  |  | ||||||
| 	/* Set enable bits */ | 	/* Set enable bits */ | ||||||
| 	en_reg = GPI_SMI_EN_OFFSET(group); | 	en_reg = GPI_SMI_EN_OFFSET(group); | ||||||
| 	value = iosf_read(port, en_reg ); | 	value = iosf_read(port, en_reg); | ||||||
| 	value |= 1 << (pin % GPIO_MAX_NUM_PER_GROUP); | 	value |= 1 << (pin % GPIO_MAX_NUM_PER_GROUP); | ||||||
| 	iosf_write(port, en_reg, value); | 	iosf_write(port, en_reg, value); | ||||||
| } | } | ||||||
| @@ -348,7 +348,7 @@ int gpi_status_get(const struct gpi_status *sts, gpio_t gpi) | |||||||
| /* Helper function to map PMC register groups to tier1 sci groups */ | /* Helper function to map PMC register groups to tier1 sci groups */ | ||||||
| static int pmc_gpe_route_to_gpio(int route) | static int pmc_gpe_route_to_gpio(int route) | ||||||
| { | { | ||||||
| 	switch(route) { | 	switch (route) { | ||||||
| 	case PMC_GPE_SW_31_0: | 	case PMC_GPE_SW_31_0: | ||||||
| 		return GPIO_GPE_SW_31_0; | 		return GPIO_GPE_SW_31_0; | ||||||
| 	case PMC_GPE_SW_63_32: | 	case PMC_GPE_SW_63_32: | ||||||
|   | |||||||
| @@ -61,7 +61,7 @@ void reset_prepare(void) | |||||||
|  |  | ||||||
| void chipset_handle_reset(uint32_t status) | void chipset_handle_reset(uint32_t status) | ||||||
| { | { | ||||||
| 	switch(status) { | 	switch (status) { | ||||||
| 	case FSP_STATUS_RESET_REQUIRED_5: /* Global Reset */ | 	case FSP_STATUS_RESET_REQUIRED_5: /* Global Reset */ | ||||||
| 		global_reset(); | 		global_reset(); | ||||||
| 		break; | 		break; | ||||||
|   | |||||||
| @@ -65,7 +65,7 @@ void lpss_console_uart_init(void) | |||||||
|  |  | ||||||
| uintptr_t uart_platform_base(int idx) | uintptr_t uart_platform_base(int idx) | ||||||
| { | { | ||||||
| 	return (CONFIG_CONSOLE_UART_BASE_ADDRESS); | 	return CONFIG_CONSOLE_UART_BASE_ADDRESS; | ||||||
| } | } | ||||||
|  |  | ||||||
| static const struct pad_config uart_gpios[] = { | static const struct pad_config uart_gpios[] = { | ||||||
|   | |||||||
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