skl mainboards/dt: Drop SataSalpSupport setting if disabled
The attributes are initialized with 0 and thus setting them to 0 makes them superfluous. Remove them. Change-Id: Icb41f0a9baded01267410bd4c9458ab4bfb82b70 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83175 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marvin Evers <marvin.n.evers@gmail.com>
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@ -58,7 +58,6 @@ chip soc/intel/skylake
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device ref thermal on end
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device ref heci1 on end
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device ref sata on
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register "SataSalpSupport" = "0"
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# Ports
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register "SataPortsEnable[0]" = "1"
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register "SataPortsEnable[2]" = "1"
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@ -36,7 +36,6 @@ chip soc/intel/skylake
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register "gen3_dec" = "0x00fc0901"
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# FSP Configuration
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register "SataSalpSupport" = "0"
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register "SataPortsEnable[0]" = "0"
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register "DspEnable" = "1"
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register "IoBufferOwnership" = "3"
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@ -65,7 +65,6 @@ chip soc/intel/skylake
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register "s0ix_enable" = true
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# FSP Configuration
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register "SataSalpSupport" = "0"
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register "SataPortsEnable[0]" = "1"
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register "SataPortsEnable[1]" = "1"
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register "SataPortsDevSlp[1]" = "1"
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@ -35,7 +35,6 @@ chip soc/intel/skylake
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register "dptf_enable" = "1"
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# FSP Configuration
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register "SataSalpSupport" = "0"
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register "SataPortsEnable[0]" = "0"
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register "DspEnable" = "1"
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register "IoBufferOwnership" = "3"
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@ -43,7 +43,6 @@ chip soc/intel/skylake
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register "CmdTriStateDis" = "1"
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# FSP Configuration
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register "SataSalpSupport" = "0"
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register "SataPortsEnable[0]" = "0"
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register "DspEnable" = "1"
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register "IoBufferOwnership" = "3"
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@ -31,7 +31,6 @@ chip soc/intel/skylake
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register "s0ix_enable" = true
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# FSP Configuration
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register "SataSalpSupport" = "0"
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register "SataPortsEnable[0]" = "0"
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register "DspEnable" = "1"
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register "IoBufferOwnership" = "3"
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@ -40,7 +40,6 @@ chip soc/intel/skylake
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register "s0ix_enable" = true
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# FSP Configuration
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register "SataSalpSupport" = "0"
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register "DspEnable" = "1"
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register "IoBufferOwnership" = "3"
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register "ScsEmmcHs400Enabled" = "1"
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@ -40,7 +40,6 @@ chip soc/intel/skylake
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register "s0ix_enable" = true
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# FSP Configuration
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register "SataSalpSupport" = "0"
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register "SataPortsEnable[0]" = "0"
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register "DspEnable" = "1"
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register "IoBufferOwnership" = "3"
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@ -36,7 +36,6 @@ chip soc/intel/skylake
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register "CmdTriStateDis" = "1"
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# FSP Configuration
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register "SataSalpSupport" = "0"
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register "SataPortsEnable[0]" = "0"
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register "DspEnable" = "1"
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register "IoBufferOwnership" = "3"
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@ -43,7 +43,6 @@ chip soc/intel/skylake
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register "CmdTriStateDis" = "1"
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# FSP Configuration
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register "SataSalpSupport" = "0"
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register "SataPortsEnable[0]" = "0"
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register "DspEnable" = "1"
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register "IoBufferOwnership" = "3"
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@ -40,7 +40,6 @@ chip soc/intel/skylake
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register "s0ix_enable" = true
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# FSP Configuration
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register "SataSalpSupport" = "0"
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register "SataPortsEnable[0]" = "0"
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register "DspEnable" = "1"
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register "IoBufferOwnership" = "3"
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@ -33,7 +33,6 @@ chip soc/intel/skylake
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register "dptf_enable" = "0"
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# FSP Configuration
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register "SataSalpSupport" = "0"
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register "SataPortsEnable" = "{
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[0] = 1,
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[1] = 1,
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@ -28,7 +28,6 @@ chip soc/intel/skylake
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register "tcc_offset" = "5" # TCC of 95C
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# FSP Configuration
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register "SataSalpSupport" = "0"
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register "DspEnable" = "0"
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register "IoBufferOwnership" = "0"
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register "SkipExtGfxScan" = "1"
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@ -41,7 +41,6 @@ chip soc/intel/skylake
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register "dptf_enable" = "0"
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# FSP Configuration
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register "SataSalpSupport" = "0"
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register "SataPortsEnable[0]" = "1"
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register "SataPortsEnable[1]" = "0"
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register "SataPortsEnable[2]" = "1"
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@ -22,7 +22,6 @@ chip soc/intel/skylake
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register "dptf_enable" = "0"
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# FSP Configuration
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register "SataSalpSupport" = "0"
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register "SataPortsEnable" = "{
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[0] = 0,
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[1] = 0,
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@ -128,7 +128,6 @@ chip soc/intel/skylake
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end
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device ref thermal on end
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device ref sata on
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register "SataSalpSupport" = "0"
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register "SataSpeedLimit" = "2"
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register "SataPortsEnable" = "{
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[0] = 1,
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