Merge 4.16
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This section contains documentation about Intel-FSP in public domain.
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## Integration Guidelines
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Some guiding principles when working on the glue to integrate FSP into
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coreboot, e.g. on how to configure a board in devicetree when that affects
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the way FSP works:
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* It should be possible to replace FSP based boot with a native coreboot
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implementation for a given chipset without touching the mainboard code.
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* The devicetree configures coreboot and part of what coreboot does with the
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information is setting some FSP UPDs. The devicetree isn't supposed to
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directly configure FSP.
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## Bugs
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As Intel doesn't even list known bugs, they are collected here until
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those are fixed. If possible a workaround is described here as well.
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