mb/google/brya: Enable FSP UPD LpDdrDqDqsReTraining

FSP default value for LpDdrDqDqsReTraining is 1. For boards
that didn't set LpDdrDqDqsReTraining to any value, 0 was being
assigned and it caused black screen issue.

BUG=b:302465393
TEST=Boot to OS with debug FSP, check LpDdrDqDqsReTraining = 1

Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Change-Id: I301a6e43f2944ffbc63431393378ab8b23450032
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79527
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>

src/mainboard/google/brya/variants/agah/memory.c

@@ -61,6 +61,8 @@ static const struct mb_cfg baseboard_memcfg = {
 		.ddr7 = { .dqs0 = 0, .dqs1 = 1 },
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = 1, /* Enable Early Command Training */
 };
 

src/mainboard/google/brya/variants/aurash/memory.c

@@ -16,6 +16,8 @@ static const struct mb_cfg ddr4_mem_config = {
 		.targets = {50, 20, 25, 25, 25},
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = 1, /* Early Command Training */
 
 	.UserBd = BOARD_TYPE_MOBILE,

src/mainboard/google/brya/variants/banshee/memory.c

@@ -14,6 +14,8 @@ static const struct mb_cfg ddr4_mem_config = {
 		.targets = {50, 20, 25, 25, 25},
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = 1, /* Early Command Training */
 
 	.UserBd = BOARD_TYPE_MOBILE,

src/mainboard/google/brya/variants/baseboard/brask/memory.c

@@ -16,6 +16,8 @@ static const struct mb_cfg ddr4_mem_config = {
 		.targets = {50, 20, 25, 25, 25},
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = 1, /* Early Command Training */
 
 	.UserBd = BOARD_TYPE_MOBILE,

src/mainboard/google/brya/variants/baseboard/brya/memory.c

@@ -63,6 +63,8 @@ static const struct mb_cfg baseboard_memcfg = {
 		.ddr7 = { .dqs0 = 0, .dqs1 = 1 },
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = 1, /* Enable Early Command Training */
 };
 

src/mainboard/google/brya/variants/baseboard/hades/memory.c

@@ -16,6 +16,8 @@ static const struct mb_cfg ddr5_mem_config = {
 		.targets = {50, 20, 25, 25, 25},
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = 1, /* Early Command Training */
 
 	.UserBd = BOARD_TYPE_MOBILE,

src/mainboard/google/brya/variants/constitution/memory.c

@@ -63,6 +63,8 @@ static const struct mb_cfg baseboard_memcfg = {
 		.ddr7 = { .dqs0 = 1, .dqs1 = 0 },
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = 1, /* Enable Early Command Training */
 };
 

src/mainboard/google/brya/variants/crota/memory.c

@@ -67,6 +67,8 @@ static const struct mb_cfg baseboard_memcfg = {
 		.ccc_config = 0xff,
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = 1, /* Early Command Training */
 
 };

src/mainboard/google/brya/variants/gaelin/memory.c

@@ -16,6 +16,8 @@ static const struct mb_cfg ddr4_mem_config = {
 		.targets = {50, 20, 25, 25, 25},
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = 1, /* Early Command Training */
 
 	.UserBd = BOARD_TYPE_MOBILE,

src/mainboard/google/brya/variants/kano/memory.c

@@ -63,6 +63,8 @@ static const struct mb_cfg kano_memcfg = {
 		.ddr7 = { .dqs0 = 1, .dqs1 = 0 },
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = 1, /* Enable Early Command Training */
 };
 
@@ -125,6 +127,8 @@ static const struct mb_cfg hynix_memcfg = {
 		.ddr7 = { .dqs0 = 1, .dqs1 = 0 },
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = 1, /* Enable Early Command Training */
 
 	.cs_pi_start_high_in_ect = 1,

src/mainboard/google/brya/variants/kinox/memory.c

@@ -17,6 +17,8 @@ static const struct mb_cfg ddr4_mem_config = {
 		.targets = {50, 20, 25, 25, 25},
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = 1, /* Early Command Training */
 
 	.UserBd = BOARD_TYPE_MOBILE,

src/mainboard/google/brya/variants/marasov/memory.c

@@ -65,6 +65,8 @@ static const struct mb_cfg baseboard_memcfg = {
 		.ccc_config = 0xff,
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = 1, /* Early Command Training */
 
 	.UserBd = BOARD_TYPE_ULT_ULX,

src/mainboard/google/brya/variants/moli/memory.c

@@ -16,6 +16,8 @@ static const struct mb_cfg ddr4_mem_config = {
 		.targets = {50, 20, 25, 25, 25},
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = 1, /* Early Command Training */
 
 	.UserBd = BOARD_TYPE_MOBILE,

src/mainboard/google/brya/variants/omnigul/memory.c

@@ -67,6 +67,8 @@ static const struct mb_cfg baseboard_memcfg = {
 
 	.ect = 1, /* Early Command Training */
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.UserBd = BOARD_TYPE_ULT_ULX,
 };
 

src/mainboard/google/brya/variants/osiris/memory.c

@@ -63,6 +63,8 @@ static const struct mb_cfg osiris_memcfg = {
 		.ddr7 = { .dqs0 = 0, .dqs1 = 1 },
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = 1, /* Enable Early Command Training */
 };
 
@@ -125,6 +127,8 @@ static const struct mb_cfg hynix_memcfg = {
 		.ddr7 = { .dqs0 = 0, .dqs1 = 1 },
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = 1, /* Enable Early Command Training */
 
 	.cs_pi_start_high_in_ect = 1,

src/mainboard/google/brya/variants/taeko/memory.c

@@ -66,6 +66,8 @@ static const struct mb_cfg baseboard_memcfg = {
 		.ddr7 = { .dqs0 = 0, .dqs1 = 1 },
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = 1, /* Enable Early Command Training */
 };
 
@@ -128,6 +130,8 @@ static const struct mb_cfg hynix_memconfig = {
 		.ddr7 = { .dqs0 = 0, .dqs1 = 1 },
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = 1, /* Enable Early Command Training */
 
 	.cs_pi_start_high_in_ect = 1,

src/mainboard/google/brya/variants/taeko4es/memory.c

@@ -63,6 +63,8 @@ static const struct mb_cfg baseboard_memcfg = {
 		.ddr7 = { .dqs0 = 0, .dqs1 = 1 },
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = 1, /* Enable Early Command Training */
 };
 

src/mainboard/google/brya/variants/taniks/memory.c

@@ -63,6 +63,8 @@ static const struct mb_cfg baseboard_memcfg = {
 		.ddr7 = { .dqs0 = 0, .dqs1 = 1 },
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = 1, /* Enable Early Command Training */
 };
 

src/mainboard/google/brya/variants/vell/memory.c

@@ -58,6 +58,8 @@ static const struct mb_cfg baseboard_memcfg = {
 		.ddr7 = { .dqs0 = 0, .dqs1 = 1 },
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = true, /* Early Command Training */
 	.UserBd =  BOARD_TYPE_ULT_ULX_T4,