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soc/mediatek/mt8186: Add support for regulator VMCH and VMC

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Add support for VMCH and VMC of MT6366.

TEST=measure voltage 3.3V for VMCH and VMC
BUG=b:202871018

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: Id8d98b6d827abd4713ee5c216941a9621422c7eb
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59254
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
This commit is contained in:
Rex-BC Chen
2021-10-28 17:17:14 +08:00
committed by Hung-Te Lin
parent a10bc29dd2
commit dc4c2b95f4
2 changed files with 124 additions and 0 deletions
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8
src/soc/mediatek/mt8186/include/soc/mt6366.h
View File

@@ -37,7 +37,13 @@ enum {
PMIC_VDRAM1_VOSEL = 0x1626,
PMIC_SMPS_ANA_CON0 = 0x1808,
PMIC_VDDQ_OP_EN = 0x1b16,
PMIC_LDO_VMC_CON0 = 0x1cc4,
PMIC_LDO_VMC_OP_EN = 0x1cc6,
PMIC_LDO_VMCH_CON0 = 0x1cd8,
PMIC_LDO_VMCH_OP_EN = 0x1cda,
PMIC_VSIM2_ANA_CON0 = 0x1e30,
PMIC_VMCH_ANA_CON0 = 0x1e48,
PMIC_VMC_ANA_CON0 = 0x1e4c,
PMIC_VDDQ_ELR_0 = 0x1ec4,
};
@@ -45,6 +51,8 @@ enum mt6366_regulator_id {
MT6366_VCORE = 0,
MT6366_VDRAM1,
MT6366_VDDQ,
MT6366_VMCH,
MT6366_VMC,
MT6366_REGULATOR_NUM,
};

116
src/soc/mediatek/mt8186/mt6366.c
View File

@@ -560,6 +560,112 @@ static void pmic_set_vddq_vol(u32 vddq_uv)
udelay(1);
}
static u32 pmic_get_vmch_vol(void)
{
u32 vol_reg, ret;
vol_reg = pwrap_read_field(PMIC_VMCH_ANA_CON0, 0x7, 8);
switch (vol_reg) {
case 2:
ret = 2900000;
break;
case 3:
ret = 3000000;
break;
case 5:
ret = 3300000;
break;
default:
printk(BIOS_ERR, "ERROR[%s] VMCH read fail: %d\n", __func__, vol_reg);
ret = 0;
break;
}
return ret;
}
static void pmic_set_vmch_vol(u32 vmch_uv)
{
u32 val = 0;
switch (vmch_uv) {
case 2900000:
val = 2;
break;
case 3000000:
val = 3;
break;
case 3300000:
val = 5;
break;
default:
die("ERROR[%s]: VMCH voltage %u is not support.\n", __func__, vmch_uv);
return;
}
pwrap_write_field(PMIC_VMCH_ANA_CON0, val, 0x7, 8);
/* Force SW to turn on */
pwrap_write_field(PMIC_LDO_VMCH_OP_EN, 1, 0xFF, 0);
pwrap_write_field(PMIC_LDO_VMCH_CON0, 1, 0xFF, 0);
}
static u32 pmic_get_vmc_vol(void)
{
u32 vol_reg, ret;
vol_reg = pwrap_read_field(PMIC_VMC_ANA_CON0, 0xF, 8);
switch (vol_reg) {
case 0x4:
ret = 1800000;
break;
case 0xA:
ret = 2900000;
break;
case 0xB:
ret = 3000000;
break;
case 0xD:
ret = 3300000;
break;
default:
printk(BIOS_ERR, "ERROR[%s] VMC read fail: %d\n", __func__, vol_reg);
ret = 0;
break;
}
return ret;
}
static void pmic_set_vmc_vol(u32 vmc_uv)
{
u32 val = 0;
switch (vmc_uv) {
case 1800000:
val = 0x4;
break;
case 2900000:
val = 0xA;
break;
case 3000000:
val = 0xB;
break;
case 3300000:
val = 0xD;
break;
default:
die("ERROR[%s]: VMC voltage %u is not support.\n", __func__, vmc_uv);
return;
}
pwrap_write_field(PMIC_VMC_ANA_CON0, val, 0xF, 8);
/* Force SW to turn on */
pwrap_write_field(PMIC_LDO_VMC_OP_EN, 1, 0xFF, 0);
pwrap_write_field(PMIC_LDO_VMC_CON0, 1, 0xFF, 0);
}
static void pmic_wdt_set(void)
{
/* [5]=1, RG_WDTRSTB_DEB */
@@ -667,6 +773,12 @@ void mt6366_set_voltage(enum mt6366_regulator_id id, u32 voltage_uv)
case MT6366_VDDQ:
pmic_set_vddq_vol(voltage_uv);
break;
case MT6366_VMCH:
pmic_set_vmch_vol(voltage_uv);
break;
case MT6366_VMC:
pmic_set_vmc_vol(voltage_uv);
break;
default:
printk(BIOS_ERR, "%s: PMIC %d is not supported\n", __func__, id);
break;
@@ -682,6 +794,10 @@ u32 mt6366_get_voltage(enum mt6366_regulator_id id)
return pmic_get_vdram1_vol();
case MT6366_VDDQ:
return pmic_get_vddq_vol();
case MT6366_VMCH:
return pmic_get_vmch_vol();
case MT6366_VMC:
return pmic_get_vmc_vol();
default:
printk(BIOS_ERR, "%s: PMIC %d is not supported\n", __func__, id);
break;