mb/system76/addw1/dt: Make use of chipset devicetree
Make use of the alias names defined in the chipset devicetree and remove devices which are equal to the ones from the chipset devicetree. Change-Id: Ide536c74683416b34b0984fe1bddb250e72b045b Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78837 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Crawford <tcrawford@system76.com>
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Felix Singer
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265897f9af
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dfc0ac0f95
@ -53,21 +53,17 @@ chip soc/intel/cannonlake
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device domain 0 on
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subsystemid 0x1558 0x65d1 inherit
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device pci 00.0 on end # Host Bridge
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device pci 01.0 on # GPU Port
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device ref peg0 on
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# PCI Express Graphics #0 x16, Clock 8 (NVIDIA GPU)
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register "PcieClkSrcUsage[8]" = "0x40"
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register "PcieClkSrcClkReq[8]" = "8"
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end
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device pci 02.0 on end # Integrated Graphics Device
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device pci 04.0 on # SA Thermal device
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device ref igpu on end
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device ref dptf on
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register "Device4Enable" = "1"
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end
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device pci 12.0 on end # Thermal Subsystem
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device pci 12.5 off end # UFS SCS
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device pci 12.6 off end # GSPI #2
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device pci 13.0 off end # Integrated Sensor Hub
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device pci 14.0 on # USB xHCI
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device ref thermal on end
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device ref xhci on
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register "usb2_ports" = "{
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[0] = USB2_PORT_TYPE_C(OC_SKIP), /* USB 3.1 Gen 2 TYPE-C and DisplayPort */
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[1] = USB2_PORT_TYPE_C(OC_SKIP), /* USB 3.1 Gen 2 TYPE-C */
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@ -88,33 +84,21 @@ chip soc/intel/cannonlake
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[5] = USB3_PORT_DEFAULT(OC_SKIP), /* USB 3.1 Gen 1 back */
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}"
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end
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device pci 14.2 on end # Shared SRAM
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device pci 14.3 on # CNVi wifi
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device ref shared_sram on end
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device ref cnvi_wifi on
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chip drivers/wifi/generic
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register "wake" = "PME_B0_EN_BIT"
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device generic 0 on end
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end
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end
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device pci 14.5 off end # SDCard
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device pci 15.0 on end # I2C #0
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device pci 15.1 off end # I2C #1
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device pci 15.2 off end # I2C #2
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device pci 15.3 off end # I2C #3
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device pci 16.0 on end # Management Engine Interface 1
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device pci 16.1 off end # Management Engine Interface 2
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device pci 16.2 off end # Management Engine IDE-R
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device pci 16.3 off end # Management Engine KT Redirection
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device pci 16.4 off end # Management Engine Interface 3
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device pci 16.5 off end # Management Engine Interface 4
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device pci 17.0 on # SATA
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device ref i2c0 on end
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device ref sata on
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register "SataPortsEnable" = "{
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[0] = 1, /* HDD (SATA0B) */
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[1] = 1, /* SSD1 (SATA1A) */
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}"
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end
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device pci 19.2 off end # UART #2
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device pci 1a.0 off end # eMMC
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device pci 1b.0 on # PCI Express Port 17
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device ref pcie_rp17 on
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# PCI Express root port #17 x4, Clock 0 (Thunderbolt)
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register "PcieRpEnable[16]" = "1"
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register "PcieRpLtrEnable[16]" = "1"
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@ -122,10 +106,7 @@ chip soc/intel/cannonlake
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register "PcieClkSrcUsage[0]" = "16"
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register "PcieClkSrcClkReq[0]" = "0"
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end
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device pci 1b.1 off end # PCI Express Port 18
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device pci 1b.2 off end # PCI Express Port 19
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device pci 1b.3 off end # PCI Express Port 20
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device pci 1b.4 on # PCI Express Port 21
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device ref pcie_rp21 on
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# PCI Express root port #21 x4, Clock 10 (SSD2)
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register "PcieRpEnable[20]" = "1"
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register "PcieRpLtrEnable[20]" = "1"
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@ -133,18 +114,7 @@ chip soc/intel/cannonlake
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register "PcieClkSrcClkReq[10]" = "10"
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register "PcieRpSlotImplemented[20]" = "1"
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end
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device pci 1b.5 off end # PCI Express Port 22
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device pci 1b.6 off end # PCI Express Port 23
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device pci 1b.7 off end # PCI Express Port 24
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device pci 1c.0 off end # PCI Express Port 1
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device pci 1c.1 off end # PCI Express Port 2
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device pci 1c.2 off end # PCI Express Port 3
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device pci 1c.3 off end # PCI Express Port 4
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device pci 1c.4 off end # PCI Express Port 5
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device pci 1c.5 off end # PCI Express Port 6
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device pci 1c.6 off end # PCI Express Port 7
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device pci 1c.7 off end # PCI Express Port 8
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device pci 1d.0 on # PCI Express Port 9
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device ref pcie_rp9 on
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# PCI Express root port #9 x4, Clock 9 (SSD1)
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register "PcieRpEnable[8]" = "1"
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register "PcieRpLtrEnable[8]" = "1"
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@ -152,11 +122,7 @@ chip soc/intel/cannonlake
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register "PcieClkSrcClkReq[9]" = "9"
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register "PcieRpSlotImplemented[8]" = "1"
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end
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device pci 1d.1 off end # PCI Express Port 10
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device pci 1d.2 off end # PCI Express Port 11
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device pci 1d.3 off end # PCI Express Port 12
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device pci 1d.4 off end # PCI Express Port 13
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device pci 1d.5 on # PCI Express Port 14
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device ref pcie_rp14 on
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# PCI Express root port #14 x1, Clock 5 (GLAN)
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register "PcieRpEnable[13]" = "1"
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register "PcieRpLtrEnable[13]" = "1"
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@ -164,7 +130,7 @@ chip soc/intel/cannonlake
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register "PcieClkSrcClkReq[5]" = "5"
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register "PcieRpSlotImplemented[13]" = "1"
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end
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device pci 1d.6 on # PCI Express Port 15
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device ref pcie_rp15 on
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# PCI Express root port #15 x1, Clock 7 (Card Reader)
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register "PcieRpEnable[14]" = "1"
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register "PcieRpLtrEnable[14]" = "1"
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@ -172,7 +138,7 @@ chip soc/intel/cannonlake
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register "PcieClkSrcClkReq[7]" = "7"
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register "PcieRpSlotImplemented[14]" = "1"
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end
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device pci 1d.7 on # PCI Express Port 16
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device ref pcie_rp16 on
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# PCI Express root port #16 x1, Clock 6 (WLAN)
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register "PcieRpEnable[15]" = "1"
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register "PcieRpLtrEnable[15]" = "1"
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@ -180,11 +146,7 @@ chip soc/intel/cannonlake
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register "PcieClkSrcClkReq[6]" = "6"
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register "PcieRpSlotImplemented[15]" = "1"
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end
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device pci 1e.0 off end # UART #0
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device pci 1e.1 off end # UART #1
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device pci 1e.2 off end # GSPI #0
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device pci 1e.3 off end # GSPI #1
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device pci 1f.0 on # LPC Interface
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device ref lpc_espi on
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register "gen1_dec" = "0x00040069"
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register "gen2_dec" = "0x00fc0e01"
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register "gen3_dec" = "0x00fc0f01"
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@ -192,18 +154,14 @@ chip soc/intel/cannonlake
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device pnp 0c31.0 on end
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end
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end
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device pci 1f.1 off end # P2SB
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device pci 1f.2 hidden end # Power Management Controller
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device pci 1f.3 on # Intel HDA
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device ref hda on
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register "PchHdaAudioLinkHda" = "1"
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end
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device pci 1f.4 on # SMBus
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device ref smbus on
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chip drivers/i2c/tas5825m
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register "id" = "0"
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device i2c 4e on end # (8bit address: 0x9c)
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end
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end
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device pci 1f.5 on end # PCH SPI
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device pci 1f.6 off end # GbE
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end
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end
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@ -9,7 +9,7 @@ chip soc/intel/cannonlake
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device domain 0 on
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subsystemid 0x1558 0x65d1 inherit
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device pci 15.0 on # I2C #0
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device ref i2c0 on
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chip drivers/i2c/hid
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register "generic.hid" = ""SYNA1202""
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register "generic.desc" = ""Synaptics Touchpad""
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@ -10,7 +10,7 @@ chip soc/intel/cannonlake
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device domain 0 on
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subsystemid 0x1558 0x65e1 inherit
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device pci 15.0 on # I2C #0
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device ref i2c0 on
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chip drivers/i2c/hid
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register "generic.hid" = ""SYNA1202""
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register "generic.desc" = ""Synaptics Touchpad""
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