cml-u: Remove hacks no longer required for thunderbolt and camera toggle
Change-Id: I17e293f524253a14d7a07842f7abf8e75ad472a8
This commit is contained in:
@@ -1,13 +1,5 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <string.h>
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#include <acpi/acpi.h>
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#include <acpi/acpigen.h>
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#include <arch/io.h>
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#include <console/console.h>
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#include <device/device.h>
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#include <option.h>
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#include <pc80/keyboard.h>
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#include <soc/ramstage.h>
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#include "gpio.h"
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@@ -17,202 +9,3 @@ void mainboard_silicon_init_params(FSP_S_CONFIG *params)
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* dependencies during hardware initialization. */
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cnl_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
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}
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static u8 superio_read(u8 reg) {
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outb(reg, 0x2E);
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return inb(0x2F);
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}
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static void superio_write(u8 reg, u8 value) {
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outb(reg, 0x2E);
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outb(value, 0x2F);
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}
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static u8 d2_read(u8 reg) {
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superio_write(0x2E, reg);
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return superio_read(0x2F);
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}
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static void d2_write(u8 reg, u8 value) {
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superio_write(0x2E, reg);
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superio_write(0x2F, value);
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}
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static u8 i2ec_read(u16 addr) {
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d2_write(0x11, (u8)(addr >> 8));
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d2_write(0x10, (u8)addr);
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return d2_read(0x12);
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}
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static void i2ec_write(u16 addr, u8 value) {
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d2_write(0x11, (u8)(addr >> 8));
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d2_write(0x10, (u8)addr);
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d2_write(0x12, value);
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}
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static void mainboard_init(struct device *dev) {
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printk(BIOS_INFO, "system76: keyboard init\n");
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pc_keyboard_init(NO_AUX_DEVICE);
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printk(BIOS_INFO, "system76: EC init\n");
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// Black magic - force enable camera toggle
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u16 addr = 0x01CA;
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u8 value = i2ec_read(addr);
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if ((value & (1 << 2)) == 0) {
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printk(BIOS_INFO, "system76: enabling camera toggle\n");
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i2ec_write(addr, value | (1 << 2));
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} else {
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printk(BIOS_INFO, "system76: camera toggle already enabled\n");
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}
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}
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static bool mainboard_pcie_hotplug(int port_number) {
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printk(BIOS_DEBUG, "system76: pcie_hotplug(%d)\n", port_number);
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/* RP01 */
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return port_number == 0;
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}
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static void pcie_hotplug_generator(int port_number)
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{
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int port;
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int have_hotplug = 0;
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for (port = 0; port < port_number; port++) {
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if (mainboard_pcie_hotplug(port)) {
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have_hotplug = 1;
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}
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}
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if (!have_hotplug) {
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return;
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}
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for (port = 0; port < port_number; port++) {
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if (mainboard_pcie_hotplug(port)) {
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char scope_name[] = "\\_SB.PCI0.RP0x";
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scope_name[sizeof("\\_SB.PCI0.RP0x") - 2] = '1' + port;
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acpigen_write_scope(scope_name);
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/*
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Device (SLOT)
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{
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Name (_ADR, 0x00)
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Method (_RMV, 0, NotSerialized)
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{
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Return (0x01)
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}
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}
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*/
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acpigen_write_device("SLOT");
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acpigen_write_name_byte("_ADR", 0x00);
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acpigen_write_method("_RMV", 0);
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/* ReturnOp */
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acpigen_emit_byte (0xa4);
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/* One */
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acpigen_emit_byte (0x01);
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acpigen_pop_len();
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acpigen_pop_len();
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acpigen_pop_len();
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}
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}
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/* Method (_L01, 0, NotSerialized)
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{
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If (\_SB.PCI0.RP04.HPCS)
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{
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Sleep (100)
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Store (0x01, \_SB.PCI0.RP04.HPCS)
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If (\_SB.PCI0.RP04.PDC)
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{
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Store (0x01, \_SB.PCI0.RP04.PDC)
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Notify (\_SB.PCI0.RP04, 0x00)
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}
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}
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}
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*/
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acpigen_write_scope("\\_GPE");
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acpigen_write_method("_L01", 0);
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for (port = 0; port < port_number; port++) {
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if (mainboard_pcie_hotplug(port)) {
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char reg_name[] = "\\_SB.PCI0.RP0x.HPCS";
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reg_name[sizeof("\\_SB.PCI0.RP0x") - 2] = '1' + port;
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acpigen_emit_byte(0xa0); /* IfOp. */
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acpigen_write_len_f();
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acpigen_emit_namestring(reg_name);
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/* Sleep (100) */
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acpigen_emit_byte(0x5b); /* SleepOp. */
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acpigen_emit_byte(0x22);
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acpigen_write_byte(100);
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/* Store (0x01, \_SB.PCI0.RP04.HPCS) */
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acpigen_emit_byte(0x70);
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acpigen_emit_byte(0x01);
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acpigen_emit_namestring(reg_name);
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memcpy(reg_name + sizeof("\\_SB.PCI0.RP0x.") - 1, "PDC", 4);
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/* If (\_SB.PCI0.RP04.PDC) */
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acpigen_emit_byte(0xa0); /* IfOp. */
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acpigen_write_len_f();
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acpigen_emit_namestring(reg_name);
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/* Store (0x01, \_SB.PCI0.RP04.PDC) */
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acpigen_emit_byte(0x70);
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acpigen_emit_byte(0x01);
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acpigen_emit_namestring(reg_name);
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reg_name[sizeof("\\_SB.PCI0.RP0x") - 1] = '\0';
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/* Notify(\_SB.PCI0.RP04, 0x00) */
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acpigen_emit_byte(0x86);
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acpigen_emit_namestring(reg_name);
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acpigen_emit_byte(0x00);
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acpigen_pop_len();
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acpigen_pop_len();
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}
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}
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acpigen_pop_len();
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acpigen_pop_len();
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}
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static void fill_ssdt(const struct device *device) {
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printk(BIOS_INFO, "system76: fill_ssdt\n");
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pcie_hotplug_generator(CONFIG_MAX_ROOT_PORTS);
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}
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static void mainboard_enable(struct device *dev) {
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dev->ops->init = mainboard_init;
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dev->ops->acpi_fill_ssdt = fill_ssdt;
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// Configure pad for DisplayPort
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uint32_t config = 0x44000200;
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uint8_t nvram = 0;
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if (get_option(&nvram, "DisplayPort_Output") == CB_SUCCESS) {
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if (nvram) {
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config |= 1;
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}
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}
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if (nvram) {
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printk(BIOS_INFO, "system76: DisplayPort_Output set to USB-C: 0x%x\n", config);
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} else {
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printk(BIOS_INFO, "system76: DisplayPort_Output set to Mini_DisplayPort: 0x%x\n", config);
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}
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struct pad_config displayport_gpio_table[] = {
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/* PS8338B_SW */
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_PAD_CFG_STRUCT(GPP_A22, config, 0x0),
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};
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gpio_configure_pads(displayport_gpio_table, ARRAY_SIZE(displayport_gpio_table));
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}
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struct chip_operations mainboard_ops = {
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.enable_dev = mainboard_enable,
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};
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