soc/amd/common/*/Kconfig: remove unneeded default n for bool options

n is the default of bool Kconfig options, so no need to have that added
to each option.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I8775d84caee6fda95eb7749e96090fe05417e764
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50779
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Held
2021-02-16 00:48:49 +01:00
parent 86e9b41ac2
commit e18a97813b
21 changed files with 0 additions and 35 deletions

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@@ -7,7 +7,6 @@ if SOC_AMD_COMMON
config SOC_AMD_PI config SOC_AMD_PI
bool bool
default n
source "src/soc/amd/common/block/*/Kconfig" source "src/soc/amd/common/block/*/Kconfig"

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@@ -2,6 +2,5 @@ config SOC_AMD_COMMON_BLOCK_ACPI
bool bool
depends on SOC_AMD_COMMON_BLOCK_ACPIMMIO depends on SOC_AMD_COMMON_BLOCK_ACPIMMIO
select ACPI_AMD_HARDWARE_SLEEP_VALUES select ACPI_AMD_HARDWARE_SLEEP_VALUES
default n
help help
Select this option to use the AcpiMmio ACPI registers. Select this option to use the AcpiMmio ACPI registers.

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@@ -1,6 +1,5 @@
config SOC_AMD_COMMON_BLOCK_ACPIMMIO config SOC_AMD_COMMON_BLOCK_ACPIMMIO
bool bool
default n
help help
Select this option to enable hardware blocks in the AcpiMmio Select this option to enable hardware blocks in the AcpiMmio
address space (0xfed8xxxx). address space (0xfed8xxxx).

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@@ -1,5 +1,4 @@
config SOC_AMD_COMMON_BLOCK_ALINK config SOC_AMD_COMMON_BLOCK_ALINK
bool bool
default n
help help
Select this option to access the FCH A-link configuration registers. Select this option to access the FCH A-link configuration registers.

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@@ -1,6 +1,5 @@
config SOC_AMD_COMMON_BLOCK_AOAC config SOC_AMD_COMMON_BLOCK_AOAC
bool bool
default n
help help
Select this option to add the common functions for the AOAC (always Select this option to add the common functions for the AOAC (always
on, always connected) block to the build. on, always connected) block to the build.

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@@ -1,6 +1,5 @@
config SOC_AMD_COMMON_BLOCK_CAR config SOC_AMD_COMMON_BLOCK_CAR
bool bool
default n
help help
This option allows the SOC to use a standard AMD cache-as-ram (CAR) This option allows the SOC to use a standard AMD cache-as-ram (CAR)
implementation. CAR setup is built into bootblock and teardown is implementation. CAR setup is built into bootblock and teardown is
@@ -14,7 +13,6 @@ config SOC_AMD_COMMON_BLOCK_CAR
config SOC_AMD_COMMON_BLOCK_NONCAR config SOC_AMD_COMMON_BLOCK_NONCAR
bool bool
default n
help help
From family 17h on AMD CPUs/APUs don't use cache as RAM (CAR) any From family 17h on AMD CPUs/APUs don't use cache as RAM (CAR) any
more, since the RAM initialization is already done by the PSP when more, since the RAM initialization is already done by the PSP when
@@ -30,7 +28,6 @@ endif # SOC_AMD_COMMON_BLOCK_NONCAR
config SOC_AMD_COMMON_BLOCK_SMM config SOC_AMD_COMMON_BLOCK_SMM
bool bool
default n
help help
Add common SMM relocation and handler functionality to the build. Add common SMM relocation and handler functionality to the build.
@@ -39,7 +36,6 @@ config SOC_AMD_COMMON_BLOCK_TSC_FAM17H_19H
select COLLECT_TIMESTAMPS_NO_TSC # selected use SoC-specific timestamp function select COLLECT_TIMESTAMPS_NO_TSC # selected use SoC-specific timestamp function
select TSC_SYNC_LFENCE select TSC_SYNC_LFENCE
select UDELAY_TSC select UDELAY_TSC
default n
help help
Select this option to add the common functions for getting the TSC Select this option to add the common functions for getting the TSC
frequency of AMD family 17h and 19h CPUs/APUs and to provide TSC- frequency of AMD family 17h and 19h CPUs/APUs and to provide TSC-
@@ -48,7 +44,6 @@ config SOC_AMD_COMMON_BLOCK_TSC_FAM17H_19H
config SOC_AMD_COMMON_BLOCK_UCODE config SOC_AMD_COMMON_BLOCK_UCODE
bool bool
select SUPPORT_CPU_UCODE_IN_CBFS select SUPPORT_CPU_UCODE_IN_CBFS
default n
help help
Builds in support for loading uCode. Builds in support for loading uCode.

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@@ -1,7 +1,6 @@
config SOC_AMD_COMMON_BLOCK_BANKED_GPIOS config SOC_AMD_COMMON_BLOCK_BANKED_GPIOS
bool bool
depends on SOC_AMD_COMMON_BLOCK_ACPIMMIO depends on SOC_AMD_COMMON_BLOCK_ACPIMMIO
default n
help help
Select this option to use the newer style banks of GPIO signals. Select this option to use the newer style banks of GPIO signals.
These are at offsets +0x1500, +0x1600, and +0x1700 from the AcpiMmio These are at offsets +0x1500, +0x1600, and +0x1700 from the AcpiMmio

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@@ -1,6 +1,5 @@
config SOC_AMD_COMMON_BLOCK_GRAPHICS config SOC_AMD_COMMON_BLOCK_GRAPHICS
bool bool
default n
help help
Select this option to use AMD common graphics driver support. Select this option to use AMD common graphics driver support.

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@@ -1,6 +1,5 @@
config SOC_AMD_COMMON_BLOCK_HDA config SOC_AMD_COMMON_BLOCK_HDA
bool bool
default n
help help
Select this option to use AMD common High Definition Audio Select this option to use AMD common High Definition Audio
driver support. driver support.

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@@ -1,5 +1,4 @@
config SOC_AMD_COMMON_BLOCK_IOMMU config SOC_AMD_COMMON_BLOCK_IOMMU
bool bool
default n
help help
Select this option to use AMD common IOMMU support. Select this option to use AMD common IOMMU support.

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@@ -1,18 +1,15 @@
config SOC_AMD_COMMON_BLOCK_LPC config SOC_AMD_COMMON_BLOCK_LPC
bool bool
default n
help help
Select this option to use the traditional LPC-ISA bridge at D14F3. Select this option to use the traditional LPC-ISA bridge at D14F3.
config PROVIDES_ROM_SHARING config PROVIDES_ROM_SHARING
bool bool
default n
help help
Select this option if the LPC bridge supports ROM sharing. Select this option if the LPC bridge supports ROM sharing.
config SOC_AMD_COMMON_BLOCK_HAS_ESPI config SOC_AMD_COMMON_BLOCK_HAS_ESPI
bool bool
default n
help help
Select this option if platform supports eSPI using D14F3 configuration Select this option if platform supports eSPI using D14F3 configuration
registers. registers.
@@ -20,7 +17,6 @@ config SOC_AMD_COMMON_BLOCK_HAS_ESPI
config SOC_AMD_COMMON_BLOCK_USE_ESPI config SOC_AMD_COMMON_BLOCK_USE_ESPI
bool bool
depends on SOC_AMD_COMMON_BLOCK_HAS_ESPI depends on SOC_AMD_COMMON_BLOCK_HAS_ESPI
default n
help help
Select this option if mainboard uses eSPI instead of LPC (if supported Select this option if mainboard uses eSPI instead of LPC (if supported
by platform). by platform).
@@ -28,4 +24,3 @@ config SOC_AMD_COMMON_BLOCK_USE_ESPI
config SOC_AMD_COMMON_BLOCK_HAS_ESPI_SUB_DECODE config SOC_AMD_COMMON_BLOCK_HAS_ESPI_SUB_DECODE
bool bool
depends on SOC_AMD_COMMON_BLOCK_HAS_ESPI depends on SOC_AMD_COMMON_BLOCK_HAS_ESPI
default n

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@@ -1,6 +1,5 @@
config SOC_AMD_COMMON_BLOCK_PCI config SOC_AMD_COMMON_BLOCK_PCI
bool bool
default n
select SOC_AMD_COMMON_BLOCK_PCI_MMCONF select SOC_AMD_COMMON_BLOCK_PCI_MMCONF
help help
This option builds functions used to program PCI interrupt This option builds functions used to program PCI interrupt
@@ -8,7 +7,6 @@ config SOC_AMD_COMMON_BLOCK_PCI
config SOC_AMD_COMMON_BLOCK_PCI_MMCONF config SOC_AMD_COMMON_BLOCK_PCI_MMCONF
bool bool
default n
help help
Selecting this option adds the AMD-common enable_pci_mmconf function Selecting this option adds the AMD-common enable_pci_mmconf function
to the build. to the build.

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@@ -1,7 +1,6 @@
config SOC_AMD_COMMON_BLOCK_PI config SOC_AMD_COMMON_BLOCK_PI
bool bool
select HAVE_DEBUG_RAM_SETUP select HAVE_DEBUG_RAM_SETUP
default n
help help
This option builds functions that interface AMD's AGESA reference This option builds functions that interface AMD's AGESA reference
code packaged in the binaryPI form. code packaged in the binaryPI form.

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@@ -1,6 +1,5 @@
config SOC_AMD_COMMON_BLOCK_PSP config SOC_AMD_COMMON_BLOCK_PSP
bool bool
default n
help help
This option builds in the Platform Security Processor initialization This option builds in the Platform Security Processor initialization
functions. Do not select this directly in SoC code, select functions. Do not select this directly in SoC code, select
@@ -8,21 +7,18 @@ config SOC_AMD_COMMON_BLOCK_PSP
config SOC_AMD_COMMON_BLOCK_PSP_GEN1 config SOC_AMD_COMMON_BLOCK_PSP_GEN1
bool bool
default n
select SOC_AMD_COMMON_BLOCK_PSP select SOC_AMD_COMMON_BLOCK_PSP
help help
Used by the PSP in AMD systems before family 17h, e.g. stoneyridge. Used by the PSP in AMD systems before family 17h, e.g. stoneyridge.
config SOC_AMD_COMMON_BLOCK_PSP_GEN2 config SOC_AMD_COMMON_BLOCK_PSP_GEN2
bool bool
default n
select SOC_AMD_COMMON_BLOCK_PSP select SOC_AMD_COMMON_BLOCK_PSP
help help
Used by the PSP in AMD family 17h, 19h and possibly newer CPUs. Used by the PSP in AMD family 17h, 19h and possibly newer CPUs.
config SOC_AMD_PSP_SELECTABLE_SMU_FW config SOC_AMD_PSP_SELECTABLE_SMU_FW
bool bool
default n
help help
Some PSP implementations allow storing SMU firmware into cbfs and Some PSP implementations allow storing SMU firmware into cbfs and
calling the PSP to load the blobs at the proper time. calling the PSP to load the blobs at the proper time.

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@@ -1,6 +1,5 @@
config SOC_AMD_COMMON_BLOCK_S3 config SOC_AMD_COMMON_BLOCK_S3
bool bool
default n
depends on SOC_AMD_COMMON_BLOCK_ACPI depends on SOC_AMD_COMMON_BLOCK_ACPI
select CACHE_MRC_SETTINGS select CACHE_MRC_SETTINGS
select MRC_WRITE_NV_LATE select MRC_WRITE_NV_LATE

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@@ -1,5 +1,4 @@
config SOC_AMD_COMMON_BLOCK_SATA config SOC_AMD_COMMON_BLOCK_SATA
bool bool
default n
help help
Select this option to use AMD common SATA driver support. Select this option to use AMD common SATA driver support.

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@@ -1,5 +1,4 @@
config SOC_AMD_COMMON_BLOCK_SMBUS config SOC_AMD_COMMON_BLOCK_SMBUS
bool bool
default n
help help
Select this option to add FCH SMBus controller functions to the build. Select this option to add FCH SMBus controller functions to the build.

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@@ -1,6 +1,5 @@
config SOC_AMD_COMMON_BLOCK_SMI config SOC_AMD_COMMON_BLOCK_SMI
bool bool
default n
help help
Select this option to add the common functions for setting up the SMI Select this option to add the common functions for setting up the SMI
configuration to the build. configuration to the build.

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@@ -1,5 +1,4 @@
config SOC_AMD_COMMON_BLOCK_SMU config SOC_AMD_COMMON_BLOCK_SMU
bool bool
default n
help help
Select this option to add functions to communicate with the SMU to the build. Select this option to add functions to communicate with the SMU to the build.

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@@ -1,6 +1,5 @@
config SOC_AMD_COMMON_BLOCK_SPI config SOC_AMD_COMMON_BLOCK_SPI
bool bool
default n
help help
Select this option to add FCH SPI controller functions to the build. Select this option to add FCH SPI controller functions to the build.
This overwrites the structure spi_flash_ops to use FCH SPI code This overwrites the structure spi_flash_ops to use FCH SPI code
@@ -8,7 +7,6 @@ config SOC_AMD_COMMON_BLOCK_SPI
config SOC_AMD_COMMON_BLOCK_SPI_DEBUG config SOC_AMD_COMMON_BLOCK_SPI_DEBUG
bool bool
default n
config EFS_SPI_READ_MODE config EFS_SPI_READ_MODE
int int

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@@ -1,6 +1,5 @@
config SOC_AMD_COMMON_BLOCK_UART config SOC_AMD_COMMON_BLOCK_UART
bool bool
default n
help help
Select this option to add the common functions for setting up the Select this option to add the common functions for setting up the
UART configuration to the build. UART configuration to the build.
@@ -9,7 +8,6 @@ if SOC_AMD_COMMON_BLOCK_UART
config AMD_SOC_CONSOLE_UART config AMD_SOC_CONSOLE_UART
bool "Use integrated AMD SoC UART controller for console" bool "Use integrated AMD SoC UART controller for console"
default n
select DRIVERS_UART_8250MEM select DRIVERS_UART_8250MEM
select DRIVERS_UART_8250MEM_32 select DRIVERS_UART_8250MEM_32
select NO_UART_ON_SUPERIO select NO_UART_ON_SUPERIO