mb/google/corsola: Initialize USB port 0
The default MT8186 platform is to initialize USB3 port 1. Use option bit 27 in fw_config to enable initialization of USB2 port 0 to support devices mounted on it. BUG=b:335124437 TEST=boot to OS from USB-A boot to OS from SD Card BRANCH=corsola Change-Id: I725b80593f5fc498a204bf47f943c36ccbd78134 Signed-off-by: Wentao Qin <qinwentao@huaqin.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82089 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yidi Lin <yidilin@google.com>
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@@ -1,5 +1,9 @@
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## SPDX-License-Identifier: GPL-2.0-only
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fw_config
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field SECONDARY_USB 27
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option DISABLED 0
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option ENABLED 1
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end
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field AUDIO_AMP 28 29
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option AMP_ALC1019 0
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option AMP_ALC5645 1
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@@ -53,6 +53,11 @@ static void mainboard_init(struct device *dev)
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setup_usb_host();
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if (fw_config_probe(FW_CONFIG(SECONDARY_USB, ENABLED))) {
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/* Change host to USB2 port0 for initialization */
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setup_usb_secondary_host();
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}
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if (!fw_config_is_provisioned() ||
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fw_config_probe(FW_CONFIG(AUDIO_AMP, AMP_ALC1019)))
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configure_alc1019();
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@@ -4,6 +4,7 @@
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#define SOC_MEDIATEK_USB_COMMON_H
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#include <stddef.h>
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#include <stdint.h>
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/* ip_pw_ctrl0 */
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#define CTRL0_IP_SW_RST (0x1 << 0)
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@@ -162,5 +163,7 @@ void mtk_usb_prepare(void);
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void mtk_usb_adjust_phy_shift(void);
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void setup_usb_host(void);
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void update_usb_base_regs(uintptr_t ippc_base, uintptr_t sif_base);
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void setup_usb_secondary_host(void);
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void setup_usb_host_controller(void);
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#endif
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@@ -13,6 +13,12 @@
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static struct ssusb_ippc_regs *ippc_regs = (void *)(SSUSB_IPPC_BASE);
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static struct ssusb_sif_port *phy_ports = (void *)(SSUSB_SIF_BASE);
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void update_usb_base_regs(uintptr_t ippc_base, uintptr_t sif_base)
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{
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ippc_regs = (void *)ippc_base;
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phy_ports = (void *)sif_base;
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}
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static void phy_index_power_on(int index)
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{
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struct ssusb_sif_port *phy = phy_ports + index;
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@@ -150,7 +156,7 @@ __weak void mtk_usb_adjust_phy_shift(void)
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/* do nothing */
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}
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void setup_usb_host(void)
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void setup_usb_host_controller(void)
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{
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u3p_msg("Setting up USB HOST controller...\n");
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@@ -164,3 +170,9 @@ void setup_usb_host(void)
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mtk_usb_adjust_phy_shift();
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u3p_msg("phy power-on done.\n");
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}
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void setup_usb_host(void)
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{
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update_usb_base_regs(SSUSB_IPPC_BASE, SSUSB_SIF_BASE);
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setup_usb_host_controller();
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}
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12
src/soc/mediatek/common/usb_secondary.c
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12
src/soc/mediatek/common/usb_secondary.c
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@@ -0,0 +1,12 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <soc/addressmap.h>
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#include <soc/usb.h>
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void setup_usb_secondary_host(void)
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{
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/* We always consider USB2 port as the secondary UBS host regardless of the
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register naming */
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update_usb_base_regs(SSUSB_IPPC_BASE_P0, SSUSB_SIF_BASE_P0);
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setup_usb_host_controller();
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}
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@@ -51,7 +51,7 @@ ramstage-y += soc.c
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ramstage-y += ../common/spm.c spm.c
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ramstage-y += ../common/sspm.c
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ramstage-y += ../common/tps65132s.c
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ramstage-y += ../common/usb.c usb.c
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ramstage-y += ../common/usb.c ../common/usb_secondary.c usb.c
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CPPFLAGS_common += -Isrc/soc/mediatek/mt8186/include
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CPPFLAGS_common += -Isrc/soc/mediatek/common/dp/include
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@@ -76,11 +76,13 @@ enum {
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SPI5_BASE = IO_PHYS + 0x01015000,
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I2C5_BASE = IO_PHYS + 0x01016000,
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I2C9_BASE = IO_PHYS + 0x01019000,
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/* Corsola uses USB2 port1 instead of USB2 port0. */
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/* IPPC_BASE is for USB2 port1, IPPC_BASE_P0 is for USB2 port0 */
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SSUSB_IPPC_BASE_P0 = IO_PHYS + 0x01203E00,
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SSUSB_IPPC_BASE = IO_PHYS + 0x01283E00,
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MSDC0_BASE = IO_PHYS + 0x01230000,
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/* Corsola uses USB2 port1 instead of USB2 port0. */
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/* SIF_BASE is for USB2 port1, SIF_BASE_P0 is for USB2 port0 */
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SSUSB_SIF_BASE = IO_PHYS + 0x01C80300,
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SSUSB_SIF_BASE_P0 = IO_PHYS + 0x01CA0300,
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EFUSEC_BASE = IO_PHYS + 0x01CB0000,
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MIPITX_BASE = IO_PHYS + 0x01CC0000,
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MSDC0_TOP_BASE = IO_PHYS + 0x01CD0000,
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