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mb/pcengines/apu2/BiosCallOuts: don't have binaryPI clear LPC decodes

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Tell binaryPI to not disable the LPC decodes for the IO ports used by
the serial ports on the Super I/O chip during the AmdInitReset binaryPI
entry point. Checked the Stoneyridge binaryPI source code which is
closely enough related to be reasonable sure that this option only
controls which LPC decode bits get cleared and won't have any other side
effects.

TEST=Now the full console output from the APU2 board gets printed on the
serial console.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Suggested-by: Krystian Hebel <krystian.hebel@3mdeb.com>
Change-Id: I91ef4423bd7bf6c1d7a175336f0f89479f2cde02
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79852
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Krystian Hebel <krystian.hebel@3mdeb.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Held 2024-01-09 16:08:12 +01:00
parent eed97c538c
commit e34a1f9815
1 changed files with 1 additions and 1 deletions
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2
src/mainboard/pcengines/apu2/BiosCallOuts.c
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@ -45,7 +45,7 @@ void board_FCH_InitReset(struct sysinfo *cb_NA, FCH_RESET_DATA_BLOCK *FchParams)
{
printk(BIOS_DEBUG, "Fch OEM config in INIT RESET ");
//FchParams_reset->EcChannel0 = TRUE; /* logical devicd 3 */
FchParams->LegacyFree = CONFIG(HUDSON_LEGACY_FREE);
FchParams->LegacyFree = 0; /* don't clear LPC IO decodes for serial console */
FchParams->FchReset.SataEnable = hudson_sata_enable();
FchParams->FchReset.IdeEnable = hudson_ide_enable();
FchParams->FchReset.Xhci0Enable = CONFIG(HUDSON_XHCI_ENABLE);