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superio/ite: Add function to disable PME# output

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A function to disable the PME# output was added. This is required to
set up the SuperIO on the "HP Pro 3500 Series" mb.

Change-Id: I94f023ba6eb24b5fb1c5e0b30eb65738f50a87eb
Signed-off-by: Joel Linn <jl@conductive.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81589
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
This commit is contained in:
Joel Linn
2024-03-26 18:37:36 +01:00
committed by Nico Huber
parent a7c96155b9
commit e45d6bfd8a
2 changed files with 17 additions and 0 deletions
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16
src/superio/ite/common/early_serial.c
View File

@@ -15,6 +15,7 @@
#define ITE_CONFIG_REG_WATCHDOG 0x72 /* watchdog config */ #define ITE_CONFIG_REG_WATCHDOG 0x72 /* watchdog config */
#define ITE_CONFIG_REG_WDT_TIMEOUT_LSB 0x73 /* watchdog timeout (LSB) */ #define ITE_CONFIG_REG_WDT_TIMEOUT_LSB 0x73 /* watchdog timeout (LSB) */
#define ITE_CONFIG_REG_WDT_TIMEOUT_MSB 0x74 /* watchdog timeout (MSB) */ #define ITE_CONFIG_REG_WDT_TIMEOUT_MSB 0x74 /* watchdog timeout (MSB) */
#define ITE_CONFIG_REG_APC_PME_CTL1 0xf2 /* APC_PME Control 1 */
#define ITE_CONFIG_REG_APC_PME_CTL2 0xf4 /* APC_PME Control 2 */ #define ITE_CONFIG_REG_APC_PME_CTL2 0xf4 /* APC_PME Control 2 */
/* Helper procedure */ /* Helper procedure */
@@ -142,6 +143,21 @@ void ite_kill_watchdog(pnp_devfn_t dev)
pnp_exit_conf_state(dev); pnp_exit_conf_state(dev);
} }
/*
* Disable PME# Output
* pass EC_DEV
*/
void ite_disable_pme_out(pnp_devfn_t dev)
{
u8 tmp;
pnp_enter_conf_state(dev);
pnp_set_logical_device(dev);
tmp = pnp_read_config(dev, ITE_CONFIG_REG_APC_PME_CTL1);
tmp |= 0x40;
pnp_write_config(dev, ITE_CONFIG_REG_APC_PME_CTL1, tmp);
pnp_exit_conf_state(dev);
}
/* /*
* Set AC resume to be up to the Southbridge * Set AC resume to be up to the Southbridge
* pass EC_DEV * pass EC_DEV

1
src/superio/ite/common/ite.h
View File

@@ -18,6 +18,7 @@ void ite_reg_write(pnp_devfn_t dev, u8 reg, u8 value);
void ite_set_3vsbsw(pnp_devfn_t dev, bool enable); void ite_set_3vsbsw(pnp_devfn_t dev, bool enable);
void ite_delay_pwrgd3(pnp_devfn_t dev); void ite_delay_pwrgd3(pnp_devfn_t dev);
void ite_kill_watchdog(pnp_devfn_t dev); void ite_kill_watchdog(pnp_devfn_t dev);
void ite_disable_pme_out(pnp_devfn_t dev);
void ite_ac_resume_southbridge(pnp_devfn_t dev); void ite_ac_resume_southbridge(pnp_devfn_t dev);
/* Alias for backwards compatibility */ /* Alias for backwards compatibility */