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device: Use pcidev_path_on_root()

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Change-Id: I2e28b9f4ecaf258bff8a062b5a54cb3d8e2bb9b0
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30400
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Kyösti Mälkki
2018-06-21 16:20:55 +03:00
committed by Felix Held
parent c70eed1e62
commit e7377556cc
30 changed files with 40 additions and 42 deletions
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2
src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c
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@@ -59,7 +59,7 @@ static void ConfigureDefaultUpdData(UPD_DATA_REGION *UpdData)
DEVTREE_CONST config_t *config;
printk(BIOS_DEBUG, "Configure Default UPD Data\n");
dev = dev_find_slot(0, SOC_DEV_FUNC);
dev = pcidev_path_on_root(SOC_DEV_FUNC);
config = dev->chip_info;
/* Set SPD addresses */

2
src/northbridge/intel/gm45/raminit.c
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@@ -1165,7 +1165,7 @@ static unsigned int get_mmio_size(void)
const struct device *dev;
const struct northbridge_intel_gm45_config *cfg = NULL;
dev = dev_find_slot(0, HOST_BRIDGE);
dev = pcidev_path_on_root(HOST_BRIDGE);
if (dev)
cfg = dev->chip_info;

2
src/northbridge/intel/haswell/northbridge.c
View File

@@ -459,7 +459,7 @@ static void disable_devices(void)
deven = pci_read_config32(host_dev, DEVEN);
for (i = 0; i < ARRAY_SIZE(nb_devs); i++) {
struct device *dev = dev_find_slot(0, nb_devs[i].devfn);
struct device *dev = pcidev_path_on_root(nb_devs[i].devfn);
if (!dev || !dev->enabled) {
printk(BIOS_DEBUG, "Disabling %s.\n", nb_devs[i].name);
deven &= ~nb_devs[i].mask;

2
src/northbridge/intel/nehalem/raminit.c
View File

@@ -1366,7 +1366,7 @@ static unsigned int get_mmio_size(void)
const struct device *dev;
const struct northbridge_intel_nehalem_config *cfg = NULL;
dev = dev_find_slot(0, HOST_BRIDGE);
dev = pcidev_path_on_root(HOST_BRIDGE);
if (dev)
cfg = dev->chip_info;

4
src/northbridge/intel/sandybridge/raminit_common.c
View File

@@ -383,7 +383,7 @@ unsigned int get_mem_min_tck(void)
const struct device *dev;
const struct northbridge_intel_sandybridge_config *cfg = NULL;
dev = dev_find_slot(0, HOST_BRIDGE);
dev = pcidev_path_on_root(HOST_BRIDGE);
if (dev)
cfg = dev->chip_info;
@@ -449,7 +449,7 @@ static unsigned int get_mmio_size(void)
const struct device *dev;
const struct northbridge_intel_sandybridge_config *cfg = NULL;
dev = dev_find_slot(0, HOST_BRIDGE);
dev = pcidev_path_on_root(HOST_BRIDGE);
if (dev)
cfg = dev->chip_info;