mb/prodrive/hermes: Get rid of variant structure

There's no need to use a variant structure here. Only one variant is
used, and revision-specific differences are handled at run-time, and
it's unlikely that another variant will ever exist.

Reorganize the mainboard code to get rid of the variant structure.

Change-Id: I1543f5b76975b0e7183fbb759e9bae5c34151d06
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59671
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Angel Pons 2021-11-25 13:15:07 +01:00 committed by Felix Held
parent c1d49b65b8
commit e81560c6cf
20 changed files with 185 additions and 225 deletions

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@ -45,9 +45,6 @@ config PCIEXP_CLK_PM
bool
default n
config VARIANT_DIR
default "baseboard" if BOARD_PRODRIVE_HERMES_BASEBOARD
config MAX_CPUS
int
default 16

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@ -1,16 +1,12 @@
# SPDX-License-Identifier: GPL-2.0-or-later
subdirs-y += variants/$(VARIANT_DIR)
CPPFLAGS_common += -I$(src)/mainboard/prodrive/hermes/variants/$(VARIANT_DIR)/include
bootblock-y += bootblock.c
romstage-y += memory.c
bootblock-y += gpio.c
romstage-y += eeprom.c
ramstage-y += gpio.c
ramstage-y += ramstage.c
ramstage-y += mainboard.c
ramstage-y += eeprom.c
ramstage-y += smbios.c
ramstage-$(CONFIG_AZALIA_PLUGIN_SUPPORT) += variants/baseboard/hda_verb.c
ramstage-$(CONFIG_AZALIA_PLUGIN_SUPPORT) += variants/r04/hda_verb.c

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@ -1,5 +1,7 @@
Category: server
Vendor name: Prodrive
Board name: Hermes
Board URL: https://prodrive-technologies.com/products/embedded-computing-systems/motherboards/hermes-8th-9th-gen-series/
ROM package: SOIC-8
ROM protocol: SPI
ROM socketed: n

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@ -2,8 +2,9 @@
#include <bootblock_common.h>
#include <console/console.h>
#include <gpio.h>
#include <soc/gpio.h>
#include <variant/gpio.h>
#include "gpio.h"
void bootblock_mainboard_early_init(void)

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@ -9,7 +9,7 @@
#include <soc/intel/common/block/smbus/smbuslib.h>
#include <types.h>
#include "variants/baseboard/include/eeprom.h"
#include "eeprom.h"
#define I2C_ADDR_EEPROM 0x57

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@ -1,10 +1,11 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include "include/variant/gpio.h"
#include <commonlib/helpers.h>
#include <soc/gpio.h>
#include <intelblocks/gpio_defs.h>
#include "gpio.h"
/* Pad configuration in ramstage */
static const struct pad_config gpio_table[] = {
/* ------- GPIO Group GPP_A ------- */

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@ -2,10 +2,135 @@
#include <device/azalia_device.h>
#include <types.h>
#include <console/console.h>
#include "variants/baseboard/include/eeprom.h"
#include "variants/baseboard/include/variant/variants.h"
#include "eeprom.h"
const u32 cim_verb_data[] = {
0x10ec0888, /* Codec Vendor / Device ID: Realtek ALC888 */
0x10ec0888, /* Subsystem ID */
15, /* Number of 4 dword sets */
AZALIA_SUBVENDOR(0, 0x1d336700),
/* Pin widgets */
AZALIA_PIN_CFG(0, 0x11, 0x411111f0), /* SPDIF-OUT2 - disabled */
AZALIA_PIN_CFG(0, 0x12, 0x411111f0), /* digital MIC - disabled */
AZALIA_PIN_CFG(0, 0x14, 0x01014430), /* PORT D - rear line out */
AZALIA_PIN_CFG(0, 0x16, 0x411111f0), /* PORT G - disabled */
AZALIA_PIN_CFG(0, 0x17, 0x411111f0), /* PORT H - disabled */
AZALIA_PIN_CFG(0, 0x18, 0x01a19c50), /* PORT B - rear mic in */
AZALIA_PIN_CFG(0, 0x1c, 0x411111f0), /* CD audio - disabled */
AZALIA_PIN_CFG(0, 0x1d, 0x4004c601), /* BEEPIN */
AZALIA_PIN_CFG(0, 0x1e, 0x01452160), /* SPDIF-OUT */
AZALIA_PIN_CFG(0, 0x1f, 0x01C52170), /* SPDIF-IN */
/* Config for R02 and older */
AZALIA_PIN_CFG(0, 0x19, 0x02214c40), /* port F - front hp out */
AZALIA_PIN_CFG(0, 0x1a, 0x901001f0), /* port C - internal speaker */
AZALIA_PIN_CFG(0, 0x1b, 0x01813c10), /* port E - rear line in/mic - Blue */
AZALIA_PIN_CFG(0, 0x15, 0x02a19c20), /* port A - audio hdr input */
/*
* VerbTable: CFL Display Audio Codec
* Revision ID = 0xFF
* Codec Vendor: 0x8086280B
*/
0x8086280B,
0xFFFFFFFF,
5, /* Number of 4 dword sets */
AZALIA_SUBVENDOR(2, 0x80860101),
/*
* Display Audio Verb Table
* For GEN9, the Vendor Node ID is 08h
* Port to be exposed to the inbox driver in the vanilla mode
* PORT C - BIT[7:6] = 01b
*/
0x20878101,
/* Pin Widget 5 - PORT B - Configuration Default: 0x18560010 */
AZALIA_PIN_CFG(2, 0x05, 0x18560010),
/* Pin Widget 6 - PORT C - Configuration Default: 0x18560020 */
AZALIA_PIN_CFG(2, 0x06, 0x18560020),
/* Pin Widget 7 - PORT D - Configuration Default: 0x18560030 */
AZALIA_PIN_CFG(2, 0x07, 0x18560030),
/* Disable the third converter and third Pin (NID 08h) */
0x20878100,
/* Dummy entries */
0x20878100,
0x20878100,
};
const u32 pc_beep_verbs[0] = {};
AZALIA_ARRAY_SIZES;
static const u32 r04_verb_data[] = {
AZALIA_PIN_CFG(0, 0x19, 0x02a19c20), /* PORT F - front mic in */
AZALIA_PIN_CFG(0, 0x1a, 0x01813c51), /* PORT C - rear line in (mic support) */
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0), /* PORT E - disabled */
AZALIA_PIN_CFG(0, 0x15, 0x411111f0), /* PORT A - disabled */
};
static u32 get_port_c_vref_cfg(uint8_t blue_rear_vref)
{
switch (blue_rear_vref) {
default:
case 0:
return 0x02040000;
case 1:
return 0x02041000;
case 2:
return 0x02044000;
case 3:
return 0x02045000;
case 4:
return 0x02046000;
}
}
static u32 get_front_panel_cfg(uint8_t front_panel_audio)
{
switch (front_panel_audio) {
default:
case 0:
return AZALIA_PIN_CFG_NC(0);
case 1:
return 0x022a4c40;
case 2:
return AZALIA_PIN_DESC(
INTEGRATED,
INTERNAL,
NA,
SPEAKER,
TYPE_UNKNOWN,
COLOR_UNKNOWN,
false,
0xf,
0);
}
}
static void mainboard_r0x_configure_alc888(u8 *base, u32 viddid)
{
/* Overwrite settings made by baseboard */
azalia_program_verb_table(base, r04_verb_data, ARRAY_SIZE(r04_verb_data));
const struct eeprom_board_settings *const board_cfg = get_board_settings();
if (!board_cfg)
return;
const u32 front_panel_cfg = get_front_panel_cfg(board_cfg->front_panel_audio);
const u32 verbs[] = {
AZALIA_PIN_CFG(0, 0x1b, front_panel_cfg),
0x0205000d, /* Pin 37 vrefo hidden register - used as port C vref */
get_port_c_vref_cfg(board_cfg->blue_rear_vref),
};
azalia_program_verb_table(base, verbs, ARRAY_SIZE(verbs));
}
void mainboard_azalia_program_runtime_verbs(u8 *base, u32 viddid)
{

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@ -8,10 +8,14 @@
#include <bootstate.h>
#include <device/device.h>
#include <device/dram/spd.h>
#include <gpio.h>
#include <intelblocks/gpio_defs.h>
#include <intelblocks/pmclib.h>
#include <soc/gpio.h>
#include <types.h>
#include <smbios.h>
#include "variants/baseboard/include/eeprom.h"
#include "eeprom.h"
#include "gpio.h"
/* FIXME: Example code below */

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@ -1,44 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <variant/variants.h>
#include <soc/cnl_memcfg_init.h>
static const struct cnl_mb_cfg baseboard_memcfg_cfg = {
/* Access memory info through SMBUS. */
.spd[0] = {
.read_type = READ_SMBUS,
.spd_spec = {.spd_smbus_address = 0xA0}
},
.spd[1] = {
.read_type = READ_SMBUS,
.spd_spec = {.spd_smbus_address = 0xA2}
},
.spd[2] = {
.read_type = READ_SMBUS,
.spd_spec = {.spd_smbus_address = 0xA4}
},
.spd[3] = {
.read_type = READ_SMBUS,
.spd_spec = {.spd_smbus_address = 0xA6}
},
/* Baseboard uses 121, 81 and 100 rcomp resistors */
.rcomp_resistor = {121, 81, 100},
/* Baseboard Rcomp target values. */
.rcomp_targets = {100, 40, 20, 20, 26},
/* Baseboard is an interleaved design */
.dq_pins_interleaved = 1,
/* Baseboard is using config 2 for vref_ca */
.vref_ca_config = 2,
/* Disable Early Command Training */
.ect = 0,
};
const struct cnl_mb_cfg *variant_memcfg_config(void)
{
return &baseboard_memcfg_cfg;
}

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@ -1,8 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <soc/ramstage.h>
#include <variant/gpio.h>
#include "variants/baseboard/include/eeprom.h"
#include "eeprom.h"
#include "gpio.h"
void mainboard_silicon_init_params(FSPS_UPD *supd)
{

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@ -2,14 +2,49 @@
#include <soc/cnl_memcfg_init.h>
#include <soc/romstage.h>
#include <variant/variants.h>
#include "variants/baseboard/include/eeprom.h"
#include "eeprom.h"
static const struct cnl_mb_cfg baseboard_mem_cfg = {
/* Access memory info through SMBUS. */
.spd[0] = {
.read_type = READ_SMBUS,
.spd_spec = {.spd_smbus_address = 0xA0}
},
.spd[1] = {
.read_type = READ_SMBUS,
.spd_spec = {.spd_smbus_address = 0xA2}
},
.spd[2] = {
.read_type = READ_SMBUS,
.spd_spec = {.spd_smbus_address = 0xA4}
},
.spd[3] = {
.read_type = READ_SMBUS,
.spd_spec = {.spd_smbus_address = 0xA6}
},
/* Baseboard uses 121, 81 and 100 rcomp resistors */
.rcomp_resistor = {121, 81, 100},
/* Baseboard Rcomp target values. */
.rcomp_targets = {100, 40, 20, 20, 26},
/* Baseboard is an interleaved design */
.dq_pins_interleaved = 1,
/* Baseboard is using config 2 for vref_ca */
.vref_ca_config = 2,
/* Disable Early Command Training */
.ect = 0,
};
void mainboard_memory_init_params(FSPM_UPD *memupd)
{
memupd->FspmConfig.UserBd = BOARD_TYPE_SERVER;
memupd->FspmTestConfig.SmbusSpdWriteDisable = 0;
cannonlake_memcfg_init(&memupd->FspmConfig, variant_memcfg_config());
cannonlake_memcfg_init(&memupd->FspmConfig, &baseboard_mem_cfg);
/* Overwrite memupd */
if (!check_signature(offsetof(struct eeprom_layout, mupd), FSPM_UPD_SIGNATURE))

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@ -4,7 +4,7 @@
#include <types.h>
#include <string.h>
#include "variants/baseboard/include/eeprom.h"
#include "eeprom.h"
const char *smbios_system_serial_number(void)
{

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@ -1,4 +0,0 @@
## SPDX-License-Identifier: GPL-2.0-or-later
bootblock-y += gpio.c
ramstage-y += gpio.c

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@ -1,7 +0,0 @@
Category: server
Vendor name: Prodrive
Board name: Hermes
Board URL: https://prodrive-technologies.com/products/embedded-computing-systems/motherboards/hermes-8th-9th-gen-series/
ROM protocol: SPI
ROM socketed: n
Flashrom support: y

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@ -1,65 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <device/azalia_device.h>
#include <types.h>
const u32 cim_verb_data[] = {
0x10ec0888, /* Codec Vendor / Device ID: Realtek ALC888 */
0x10ec0888, /* Subsystem ID */
15, /* Number of 4 dword sets */
AZALIA_SUBVENDOR(0, 0x1d336700),
/* Pin widgets */
AZALIA_PIN_CFG(0, 0x11, 0x411111f0), /* SPDIF-OUT2 - disabled */
AZALIA_PIN_CFG(0, 0x12, 0x411111f0), /* digital MIC - disabled */
AZALIA_PIN_CFG(0, 0x14, 0x01014430), /* PORT D - rear line out */
AZALIA_PIN_CFG(0, 0x16, 0x411111f0), /* PORT G - disabled */
AZALIA_PIN_CFG(0, 0x17, 0x411111f0), /* PORT H - disabled */
AZALIA_PIN_CFG(0, 0x18, 0x01a19c50), /* PORT B - rear mic in */
AZALIA_PIN_CFG(0, 0x1c, 0x411111f0), /* CD audio - disabled */
AZALIA_PIN_CFG(0, 0x1d, 0x4004c601), /* BEEPIN */
AZALIA_PIN_CFG(0, 0x1e, 0x01452160), /* SPDIF-OUT */
AZALIA_PIN_CFG(0, 0x1f, 0x01C52170), /* SPDIF-IN */
/* Config for R02 and older */
AZALIA_PIN_CFG(0, 0x19, 0x02214c40), /* port F - front hp out */
AZALIA_PIN_CFG(0, 0x1a, 0x901001f0), /* port C - internal speaker */
AZALIA_PIN_CFG(0, 0x1b, 0x01813c10), /* port E - rear line in/mic - Blue */
AZALIA_PIN_CFG(0, 0x15, 0x02a19c20), /* port A - audio hdr input */
/*
* VerbTable: CFL Display Audio Codec
* Revision ID = 0xFF
* Codec Vendor: 0x8086280B
*/
0x8086280B,
0xFFFFFFFF,
5, /* Number of 4 dword sets */
AZALIA_SUBVENDOR(2, 0x80860101),
/*
* Display Audio Verb Table
* For GEN9, the Vendor Node ID is 08h
* Port to be exposed to the inbox driver in the vanilla mode
* PORT C - BIT[7:6] = 01b
*/
0x20878101,
/* Pin Widget 5 - PORT B - Configuration Default: 0x18560010 */
AZALIA_PIN_CFG(2, 0x05, 0x18560010),
/* Pin Widget 6 - PORT C - Configuration Default: 0x18560020 */
AZALIA_PIN_CFG(2, 0x06, 0x18560020),
/* Pin Widget 7 - PORT D - Configuration Default: 0x18560030 */
AZALIA_PIN_CFG(2, 0x07, 0x18560030),
/* Disable the third converter and third Pin (NID 08h) */
0x20878100,
/* Dummy entries */
0x20878100,
0x20878100,
};
const u32 pc_beep_verbs[0] = {};
AZALIA_ARRAY_SIZES;

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@ -1,9 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <soc/cnl_memcfg_init.h>
#include <types.h>
/* Return memory configuration structure. */
const struct cnl_mb_cfg *variant_memcfg_config(void);
void mainboard_r0x_configure_alc888(u8 *base, u32 viddid);

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@ -1,73 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <device/azalia_device.h>
#include <types.h>
#include "variant/variants.h"
#include "eeprom.h"
static const u32 r04_verb_data[] = {
AZALIA_PIN_CFG(0, 0x19, 0x02a19c20), /* PORT F - front mic in */
AZALIA_PIN_CFG(0, 0x1a, 0x01813c51), /* PORT C - rear line in (mic support) */
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0), /* PORT E - disabled */
AZALIA_PIN_CFG(0, 0x15, 0x411111f0), /* PORT A - disabled */
};
static u32 get_port_c_vref_cfg(uint8_t blue_rear_vref)
{
switch (blue_rear_vref) {
default:
case 0:
return 0x02040000;
case 1:
return 0x02041000;
case 2:
return 0x02044000;
case 3:
return 0x02045000;
case 4:
return 0x02046000;
}
}
static u32 get_front_panel_cfg(uint8_t front_panel_audio)
{
switch (front_panel_audio) {
default:
case 0:
return AZALIA_PIN_CFG_NC(0);
case 1:
return 0x022a4c40;
case 2:
return AZALIA_PIN_DESC(
INTEGRATED,
INTERNAL,
NA,
SPEAKER,
TYPE_UNKNOWN,
COLOR_UNKNOWN,
false,
0xf,
0);
}
}
void mainboard_r0x_configure_alc888(u8 *base, u32 viddid)
{
/* Overwrite settings made by baseboard */
azalia_program_verb_table(base, r04_verb_data, ARRAY_SIZE(r04_verb_data));
const struct eeprom_board_settings *const board_cfg = get_board_settings();
if (!board_cfg)
return;
const u32 front_panel_cfg = get_front_panel_cfg(board_cfg->front_panel_audio);
const u32 verbs[] = {
AZALIA_PIN_CFG(0, 0x1b, front_panel_cfg),
0x0205000d, /* Pin 37 vrefo hidden register - used as port C vref */
get_port_c_vref_cfg(board_cfg->blue_rear_vref),
};
azalia_program_verb_table(base, verbs, ARRAY_SIZE(verbs));
}