mb/prodrive/hermes: Get rid of variant structure
There's no need to use a variant structure here. Only one variant is used, and revision-specific differences are handled at run-time, and it's unlikely that another variant will ever exist. Reorganize the mainboard code to get rid of the variant structure. Change-Id: I1543f5b76975b0e7183fbb759e9bae5c34151d06 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59671 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
		@@ -45,9 +45,6 @@ config PCIEXP_CLK_PM
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	bool
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	default n
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config VARIANT_DIR
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	default "baseboard"	if BOARD_PRODRIVE_HERMES_BASEBOARD
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config MAX_CPUS
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	int
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	default 16
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@@ -1,16 +1,12 @@
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# SPDX-License-Identifier: GPL-2.0-or-later
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subdirs-y += variants/$(VARIANT_DIR)
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CPPFLAGS_common += -I$(src)/mainboard/prodrive/hermes/variants/$(VARIANT_DIR)/include
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bootblock-y += bootblock.c
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romstage-y += memory.c
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bootblock-y += gpio.c
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romstage-y += eeprom.c
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ramstage-y += gpio.c
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ramstage-y += ramstage.c
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ramstage-y += mainboard.c
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ramstage-y += eeprom.c
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ramstage-y += smbios.c
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ramstage-$(CONFIG_AZALIA_PLUGIN_SUPPORT) += variants/baseboard/hda_verb.c
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ramstage-$(CONFIG_AZALIA_PLUGIN_SUPPORT) += variants/r04/hda_verb.c
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@@ -1,5 +1,7 @@
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Category: server
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Vendor name: Prodrive
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Board name: Hermes
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Board URL: https://prodrive-technologies.com/products/embedded-computing-systems/motherboards/hermes-8th-9th-gen-series/
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ROM package: SOIC-8
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ROM protocol: SPI
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ROM socketed: n
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@@ -2,8 +2,9 @@
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#include <bootblock_common.h>
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#include <console/console.h>
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#include <gpio.h>
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#include <soc/gpio.h>
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#include <variant/gpio.h>
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#include "gpio.h"
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void bootblock_mainboard_early_init(void)
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@@ -9,7 +9,7 @@
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#include <soc/intel/common/block/smbus/smbuslib.h>
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#include <types.h>
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#include "variants/baseboard/include/eeprom.h"
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#include "eeprom.h"
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#define I2C_ADDR_EEPROM 0x57
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@@ -1,10 +1,11 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include "include/variant/gpio.h"
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#include <commonlib/helpers.h>
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#include <soc/gpio.h>
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#include <intelblocks/gpio_defs.h>
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#include "gpio.h"
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/* Pad configuration in ramstage */
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static const struct pad_config gpio_table[] = {
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	/* ------- GPIO Group GPP_A ------- */
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@@ -2,10 +2,135 @@
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#include <device/azalia_device.h>
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#include <types.h>
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#include <console/console.h>
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#include "variants/baseboard/include/eeprom.h"
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#include "variants/baseboard/include/variant/variants.h"
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#include "eeprom.h"
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const u32 cim_verb_data[] = {
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	0x10ec0888,	/* Codec Vendor / Device ID: Realtek ALC888 */
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	0x10ec0888,	/* Subsystem ID */
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	15,		/* Number of 4 dword sets */
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	AZALIA_SUBVENDOR(0, 0x1d336700),
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	/* Pin widgets */
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	AZALIA_PIN_CFG(0, 0x11, 0x411111f0), /* SPDIF-OUT2 - disabled */
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	AZALIA_PIN_CFG(0, 0x12, 0x411111f0), /* digital MIC - disabled */
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	AZALIA_PIN_CFG(0, 0x14, 0x01014430), /* PORT D - rear line out */
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	AZALIA_PIN_CFG(0, 0x16, 0x411111f0), /* PORT G - disabled */
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	AZALIA_PIN_CFG(0, 0x17, 0x411111f0), /* PORT H - disabled */
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	AZALIA_PIN_CFG(0, 0x18, 0x01a19c50), /* PORT B - rear mic in */
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	AZALIA_PIN_CFG(0, 0x1c, 0x411111f0), /* CD audio - disabled */
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	AZALIA_PIN_CFG(0, 0x1d, 0x4004c601), /* BEEPIN */
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	AZALIA_PIN_CFG(0, 0x1e, 0x01452160), /* SPDIF-OUT */
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	AZALIA_PIN_CFG(0, 0x1f, 0x01C52170), /* SPDIF-IN */
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	/* Config for R02 and older */
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	AZALIA_PIN_CFG(0, 0x19, 0x02214c40), /* port F - front hp out */
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	AZALIA_PIN_CFG(0, 0x1a, 0x901001f0), /* port C - internal speaker */
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	AZALIA_PIN_CFG(0, 0x1b, 0x01813c10), /* port E - rear line in/mic - Blue */
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	AZALIA_PIN_CFG(0, 0x15, 0x02a19c20), /* port A - audio hdr input */
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	/*
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	 * VerbTable: CFL Display Audio Codec
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	 * Revision ID = 0xFF
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	 * Codec Vendor: 0x8086280B
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	 */
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	0x8086280B,
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	0xFFFFFFFF,
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	5,	/* Number of 4 dword sets */
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	AZALIA_SUBVENDOR(2, 0x80860101),
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	/*
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	 * Display Audio Verb Table
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	 * For GEN9, the Vendor Node ID is 08h
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	 * Port to be exposed to the inbox driver in the vanilla mode
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	 * PORT C - BIT[7:6] = 01b
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	 */
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	0x20878101,
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	/* Pin Widget 5 - PORT B - Configuration Default: 0x18560010 */
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	AZALIA_PIN_CFG(2, 0x05, 0x18560010),
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	/* Pin Widget 6 - PORT C - Configuration Default: 0x18560020 */
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	AZALIA_PIN_CFG(2, 0x06, 0x18560020),
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	/* Pin Widget 7 - PORT D - Configuration Default: 0x18560030 */
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	AZALIA_PIN_CFG(2, 0x07, 0x18560030),
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	/* Disable the third converter and third Pin (NID 08h) */
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	0x20878100,
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	/* Dummy entries */
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	0x20878100,
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	0x20878100,
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};
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const u32 pc_beep_verbs[0] = {};
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AZALIA_ARRAY_SIZES;
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static const u32 r04_verb_data[] = {
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	AZALIA_PIN_CFG(0, 0x19, 0x02a19c20), /* PORT F - front mic in */
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	AZALIA_PIN_CFG(0, 0x1a, 0x01813c51), /* PORT C - rear line in (mic support) */
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	AZALIA_PIN_CFG(0, 0x1b, 0x411111f0), /* PORT E - disabled */
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	AZALIA_PIN_CFG(0, 0x15, 0x411111f0), /* PORT A - disabled */
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};
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static u32 get_port_c_vref_cfg(uint8_t blue_rear_vref)
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{
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	switch (blue_rear_vref) {
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	default:
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	case 0:
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		return 0x02040000;
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	case 1:
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		return 0x02041000;
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	case 2:
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		return 0x02044000;
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	case 3:
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		return 0x02045000;
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	case 4:
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		return 0x02046000;
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	}
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}
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static u32 get_front_panel_cfg(uint8_t front_panel_audio)
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{
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	switch (front_panel_audio) {
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	default:
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	case 0:
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		return AZALIA_PIN_CFG_NC(0);
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	case 1:
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		return 0x022a4c40;
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	case 2:
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		return AZALIA_PIN_DESC(
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			INTEGRATED,
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			INTERNAL,
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			NA,
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			SPEAKER,
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			TYPE_UNKNOWN,
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			COLOR_UNKNOWN,
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			false,
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			0xf,
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			0);
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	}
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}
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static void mainboard_r0x_configure_alc888(u8 *base, u32 viddid)
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{
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	/* Overwrite settings made by baseboard */
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	azalia_program_verb_table(base, r04_verb_data, ARRAY_SIZE(r04_verb_data));
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	const struct eeprom_board_settings *const board_cfg = get_board_settings();
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	if (!board_cfg)
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		return;
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	const u32 front_panel_cfg = get_front_panel_cfg(board_cfg->front_panel_audio);
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	const u32 verbs[] = {
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		AZALIA_PIN_CFG(0, 0x1b, front_panel_cfg),
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		0x0205000d, /* Pin 37 vrefo hidden register - used as port C vref */
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		get_port_c_vref_cfg(board_cfg->blue_rear_vref),
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	};
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	azalia_program_verb_table(base, verbs, ARRAY_SIZE(verbs));
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}
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void mainboard_azalia_program_runtime_verbs(u8 *base, u32 viddid)
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{
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@@ -8,10 +8,14 @@
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#include <bootstate.h>
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#include <device/device.h>
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#include <device/dram/spd.h>
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#include <gpio.h>
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#include <intelblocks/gpio_defs.h>
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#include <intelblocks/pmclib.h>
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#include <soc/gpio.h>
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#include <types.h>
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#include <smbios.h>
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#include "variants/baseboard/include/eeprom.h"
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#include "eeprom.h"
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#include "gpio.h"
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/* FIXME: Example code below */
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@@ -1,44 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <variant/variants.h>
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#include <soc/cnl_memcfg_init.h>
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static const struct cnl_mb_cfg baseboard_memcfg_cfg = {
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	/* Access memory info through SMBUS. */
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	.spd[0] = {
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		.read_type = READ_SMBUS,
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		.spd_spec = {.spd_smbus_address = 0xA0}
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	},
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	.spd[1] = {
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		.read_type = READ_SMBUS,
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		.spd_spec = {.spd_smbus_address = 0xA2}
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	},
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	.spd[2] = {
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		.read_type = READ_SMBUS,
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		.spd_spec = {.spd_smbus_address = 0xA4}
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	},
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	.spd[3] = {
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		.read_type = READ_SMBUS,
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		.spd_spec = {.spd_smbus_address = 0xA6}
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	},
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	/* Baseboard uses 121, 81 and 100 rcomp resistors */
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	.rcomp_resistor = {121, 81, 100},
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	/* Baseboard Rcomp target values. */
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	.rcomp_targets = {100, 40, 20, 20, 26},
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	/* Baseboard is an interleaved design */
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	.dq_pins_interleaved = 1,
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	/* Baseboard is using config 2 for vref_ca */
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	.vref_ca_config = 2,
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	/* Disable Early Command Training */
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	.ect = 0,
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};
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const struct cnl_mb_cfg *variant_memcfg_config(void)
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{
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	return &baseboard_memcfg_cfg;
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}
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@@ -1,8 +1,9 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <soc/ramstage.h>
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#include <variant/gpio.h>
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#include "variants/baseboard/include/eeprom.h"
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#include "eeprom.h"
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#include "gpio.h"
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void mainboard_silicon_init_params(FSPS_UPD *supd)
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{
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@@ -2,14 +2,49 @@
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#include <soc/cnl_memcfg_init.h>
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#include <soc/romstage.h>
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#include <variant/variants.h>
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#include "variants/baseboard/include/eeprom.h"
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#include "eeprom.h"
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static const struct cnl_mb_cfg baseboard_mem_cfg = {
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	/* Access memory info through SMBUS. */
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	.spd[0] = {
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		.read_type = READ_SMBUS,
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		.spd_spec = {.spd_smbus_address = 0xA0}
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	},
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	.spd[1] = {
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		.read_type = READ_SMBUS,
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		.spd_spec = {.spd_smbus_address = 0xA2}
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	},
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	.spd[2] = {
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		.read_type = READ_SMBUS,
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		.spd_spec = {.spd_smbus_address = 0xA4}
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	},
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	.spd[3] = {
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		.read_type = READ_SMBUS,
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		.spd_spec = {.spd_smbus_address = 0xA6}
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	},
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	/* Baseboard uses 121, 81 and 100 rcomp resistors */
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	.rcomp_resistor = {121, 81, 100},
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	/* Baseboard Rcomp target values. */
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	.rcomp_targets = {100, 40, 20, 20, 26},
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	/* Baseboard is an interleaved design */
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	.dq_pins_interleaved = 1,
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	/* Baseboard is using config 2 for vref_ca */
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	.vref_ca_config = 2,
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	/* Disable Early Command Training */
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	.ect = 0,
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};
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void mainboard_memory_init_params(FSPM_UPD *memupd)
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{
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	memupd->FspmConfig.UserBd = BOARD_TYPE_SERVER;
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	memupd->FspmTestConfig.SmbusSpdWriteDisable = 0;
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	cannonlake_memcfg_init(&memupd->FspmConfig, variant_memcfg_config());
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	cannonlake_memcfg_init(&memupd->FspmConfig, &baseboard_mem_cfg);
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	/* Overwrite memupd */
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	if (!check_signature(offsetof(struct eeprom_layout, mupd), FSPM_UPD_SIGNATURE))
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@@ -4,7 +4,7 @@
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#include <types.h>
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#include <string.h>
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#include "variants/baseboard/include/eeprom.h"
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#include "eeprom.h"
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const char *smbios_system_serial_number(void)
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{
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@@ -1,4 +0,0 @@
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## SPDX-License-Identifier: GPL-2.0-or-later
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 | 
			
		||||
bootblock-y += gpio.c
 | 
			
		||||
ramstage-y += gpio.c
 | 
			
		||||
@@ -1,7 +0,0 @@
 | 
			
		||||
Category: server
 | 
			
		||||
Vendor name: Prodrive
 | 
			
		||||
Board name: Hermes
 | 
			
		||||
Board URL: https://prodrive-technologies.com/products/embedded-computing-systems/motherboards/hermes-8th-9th-gen-series/
 | 
			
		||||
ROM protocol: SPI
 | 
			
		||||
ROM socketed: n
 | 
			
		||||
Flashrom support: y
 | 
			
		||||
@@ -1,65 +0,0 @@
 | 
			
		||||
/* SPDX-License-Identifier: GPL-2.0-only */
 | 
			
		||||
 | 
			
		||||
#include <device/azalia_device.h>
 | 
			
		||||
#include <types.h>
 | 
			
		||||
 | 
			
		||||
const u32 cim_verb_data[] = {
 | 
			
		||||
	0x10ec0888,	/* Codec Vendor / Device ID: Realtek ALC888 */
 | 
			
		||||
	0x10ec0888,	/* Subsystem ID */
 | 
			
		||||
	15,		/* Number of 4 dword sets */
 | 
			
		||||
	AZALIA_SUBVENDOR(0, 0x1d336700),
 | 
			
		||||
 | 
			
		||||
	/* Pin widgets */
 | 
			
		||||
	AZALIA_PIN_CFG(0, 0x11, 0x411111f0), /* SPDIF-OUT2 - disabled */
 | 
			
		||||
	AZALIA_PIN_CFG(0, 0x12, 0x411111f0), /* digital MIC - disabled */
 | 
			
		||||
	AZALIA_PIN_CFG(0, 0x14, 0x01014430), /* PORT D - rear line out */
 | 
			
		||||
	AZALIA_PIN_CFG(0, 0x16, 0x411111f0), /* PORT G - disabled */
 | 
			
		||||
	AZALIA_PIN_CFG(0, 0x17, 0x411111f0), /* PORT H - disabled */
 | 
			
		||||
	AZALIA_PIN_CFG(0, 0x18, 0x01a19c50), /* PORT B - rear mic in */
 | 
			
		||||
	AZALIA_PIN_CFG(0, 0x1c, 0x411111f0), /* CD audio - disabled */
 | 
			
		||||
	AZALIA_PIN_CFG(0, 0x1d, 0x4004c601), /* BEEPIN */
 | 
			
		||||
	AZALIA_PIN_CFG(0, 0x1e, 0x01452160), /* SPDIF-OUT */
 | 
			
		||||
	AZALIA_PIN_CFG(0, 0x1f, 0x01C52170), /* SPDIF-IN */
 | 
			
		||||
 | 
			
		||||
	/* Config for R02 and older */
 | 
			
		||||
	AZALIA_PIN_CFG(0, 0x19, 0x02214c40), /* port F - front hp out */
 | 
			
		||||
	AZALIA_PIN_CFG(0, 0x1a, 0x901001f0), /* port C - internal speaker */
 | 
			
		||||
	AZALIA_PIN_CFG(0, 0x1b, 0x01813c10), /* port E - rear line in/mic - Blue */
 | 
			
		||||
	AZALIA_PIN_CFG(0, 0x15, 0x02a19c20), /* port A - audio hdr input */
 | 
			
		||||
 | 
			
		||||
	/*
 | 
			
		||||
	 * VerbTable: CFL Display Audio Codec
 | 
			
		||||
	 * Revision ID = 0xFF
 | 
			
		||||
	 * Codec Vendor: 0x8086280B
 | 
			
		||||
	 */
 | 
			
		||||
	0x8086280B,
 | 
			
		||||
	0xFFFFFFFF,
 | 
			
		||||
	5,	/* Number of 4 dword sets */
 | 
			
		||||
 | 
			
		||||
	AZALIA_SUBVENDOR(2, 0x80860101),
 | 
			
		||||
 | 
			
		||||
	/*
 | 
			
		||||
	 * Display Audio Verb Table
 | 
			
		||||
	 * For GEN9, the Vendor Node ID is 08h
 | 
			
		||||
	 * Port to be exposed to the inbox driver in the vanilla mode
 | 
			
		||||
	 * PORT C - BIT[7:6] = 01b
 | 
			
		||||
	 */
 | 
			
		||||
	0x20878101,
 | 
			
		||||
 | 
			
		||||
	/* Pin Widget 5 - PORT B - Configuration Default: 0x18560010 */
 | 
			
		||||
	AZALIA_PIN_CFG(2, 0x05, 0x18560010),
 | 
			
		||||
	/* Pin Widget 6 - PORT C - Configuration Default: 0x18560020 */
 | 
			
		||||
	AZALIA_PIN_CFG(2, 0x06, 0x18560020),
 | 
			
		||||
	/* Pin Widget 7 - PORT D - Configuration Default: 0x18560030 */
 | 
			
		||||
	AZALIA_PIN_CFG(2, 0x07, 0x18560030),
 | 
			
		||||
	/* Disable the third converter and third Pin (NID 08h) */
 | 
			
		||||
	0x20878100,
 | 
			
		||||
 | 
			
		||||
	/* Dummy entries */
 | 
			
		||||
	0x20878100,
 | 
			
		||||
	0x20878100,
 | 
			
		||||
};
 | 
			
		||||
 | 
			
		||||
const u32 pc_beep_verbs[0] = {};
 | 
			
		||||
 | 
			
		||||
AZALIA_ARRAY_SIZES;
 | 
			
		||||
@@ -1,9 +0,0 @@
 | 
			
		||||
/* SPDX-License-Identifier: GPL-2.0-only */
 | 
			
		||||
 | 
			
		||||
#include <soc/cnl_memcfg_init.h>
 | 
			
		||||
#include <types.h>
 | 
			
		||||
 | 
			
		||||
/* Return memory configuration structure. */
 | 
			
		||||
const struct cnl_mb_cfg *variant_memcfg_config(void);
 | 
			
		||||
 | 
			
		||||
void mainboard_r0x_configure_alc888(u8 *base, u32 viddid);
 | 
			
		||||
@@ -1,73 +0,0 @@
 | 
			
		||||
/* SPDX-License-Identifier: GPL-2.0-only */
 | 
			
		||||
 | 
			
		||||
#include <device/azalia_device.h>
 | 
			
		||||
#include <types.h>
 | 
			
		||||
 | 
			
		||||
#include "variant/variants.h"
 | 
			
		||||
#include "eeprom.h"
 | 
			
		||||
 | 
			
		||||
static const u32 r04_verb_data[] = {
 | 
			
		||||
	AZALIA_PIN_CFG(0, 0x19, 0x02a19c20), /* PORT F - front mic in */
 | 
			
		||||
	AZALIA_PIN_CFG(0, 0x1a, 0x01813c51), /* PORT C - rear line in (mic support) */
 | 
			
		||||
	AZALIA_PIN_CFG(0, 0x1b, 0x411111f0), /* PORT E - disabled */
 | 
			
		||||
	AZALIA_PIN_CFG(0, 0x15, 0x411111f0), /* PORT A - disabled */
 | 
			
		||||
};
 | 
			
		||||
 | 
			
		||||
static u32 get_port_c_vref_cfg(uint8_t blue_rear_vref)
 | 
			
		||||
{
 | 
			
		||||
	switch (blue_rear_vref) {
 | 
			
		||||
	default:
 | 
			
		||||
	case 0:
 | 
			
		||||
		return 0x02040000;
 | 
			
		||||
	case 1:
 | 
			
		||||
		return 0x02041000;
 | 
			
		||||
	case 2:
 | 
			
		||||
		return 0x02044000;
 | 
			
		||||
	case 3:
 | 
			
		||||
		return 0x02045000;
 | 
			
		||||
	case 4:
 | 
			
		||||
		return 0x02046000;
 | 
			
		||||
	}
 | 
			
		||||
}
 | 
			
		||||
 | 
			
		||||
static u32 get_front_panel_cfg(uint8_t front_panel_audio)
 | 
			
		||||
{
 | 
			
		||||
	switch (front_panel_audio) {
 | 
			
		||||
	default:
 | 
			
		||||
	case 0:
 | 
			
		||||
		return AZALIA_PIN_CFG_NC(0);
 | 
			
		||||
	case 1:
 | 
			
		||||
		return 0x022a4c40;
 | 
			
		||||
	case 2:
 | 
			
		||||
		return AZALIA_PIN_DESC(
 | 
			
		||||
			INTEGRATED,
 | 
			
		||||
			INTERNAL,
 | 
			
		||||
			NA,
 | 
			
		||||
			SPEAKER,
 | 
			
		||||
			TYPE_UNKNOWN,
 | 
			
		||||
			COLOR_UNKNOWN,
 | 
			
		||||
			false,
 | 
			
		||||
			0xf,
 | 
			
		||||
			0);
 | 
			
		||||
	}
 | 
			
		||||
}
 | 
			
		||||
 | 
			
		||||
void mainboard_r0x_configure_alc888(u8 *base, u32 viddid)
 | 
			
		||||
{
 | 
			
		||||
	/* Overwrite settings made by baseboard */
 | 
			
		||||
	azalia_program_verb_table(base, r04_verb_data, ARRAY_SIZE(r04_verb_data));
 | 
			
		||||
 | 
			
		||||
	const struct eeprom_board_settings *const board_cfg = get_board_settings();
 | 
			
		||||
 | 
			
		||||
	if (!board_cfg)
 | 
			
		||||
		return;
 | 
			
		||||
 | 
			
		||||
	const u32 front_panel_cfg = get_front_panel_cfg(board_cfg->front_panel_audio);
 | 
			
		||||
 | 
			
		||||
	const u32 verbs[] = {
 | 
			
		||||
		AZALIA_PIN_CFG(0, 0x1b, front_panel_cfg),
 | 
			
		||||
		0x0205000d, /* Pin 37 vrefo hidden register - used as port C vref */
 | 
			
		||||
		get_port_c_vref_cfg(board_cfg->blue_rear_vref),
 | 
			
		||||
	};
 | 
			
		||||
	azalia_program_verb_table(base, verbs, ARRAY_SIZE(verbs));
 | 
			
		||||
}
 | 
			
		||||
		Reference in New Issue
	
	Block a user