sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

soc/amd/*/root_complex: introduce and use domain_iohc_info struct

Browse Source 
Instead of implementing the functions get_iohc_misc_smn_base and
get_iohc_fabric_id in the SoC code, move those functions to the common
AMD code, and implement get_iohc_info in the SoC code that returns a
pointer to and the size of a SoC-specific array of domain_iohc_info
structs that contains the info needed by the common code instead. This
allows to iterate over the domain_iohc_info structs which will be used
in a later patch to find the PSP MMIO base address in both ramstage and
smm.

TEST=Mandolin still boots and all non-PCI MIO resources are still
reported to the resource allocator

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ifce3d2b540d14ba3cba36f7cbf248fb7c63483fe
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83443
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
This commit is contained in:
Felix Held 2024-07-12 14:06:49 +02:00
parent 9af1d3f857
commit e9e71132a3
9 changed files with 122 additions and 93 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

22
src/soc/amd/cezanne/root_complex.c
View File

@ -75,9 +75,17 @@ struct device_operations cezanne_root_complex_operations = {
.acpi_fill_ssdt = root_complex_fill_ssdt,
};
uint32_t get_iohc_misc_smn_base(struct device *domain)
static const struct domain_iohc_info iohc_info[] = {
[0] = {
.fabric_id = IOMS0_FABRIC_ID,
.misc_smn_base = SMN_IOHC_MISC_BASE_13B1,
},
};
const struct domain_iohc_info *get_iohc_info(size_t *count)
{
return SMN_IOHC_MISC_BASE_13B1;
*count = ARRAY_SIZE(iohc_info);
return iohc_info;
}
static const struct non_pci_mmio_reg non_pci_mmio[] = {
@ -99,13 +107,3 @@ const struct non_pci_mmio_reg *get_iohc_non_pci_mmio_regs(size_t *count)
*count = ARRAY_SIZE(non_pci_mmio);
return non_pci_mmio;
}
signed int get_iohc_fabric_id(struct device *domain)
{
switch (domain->path.domain.domain) {
case 0:
return IOMS0_FABRIC_ID;
default:
return -1;
}
}

6
src/soc/amd/common/block/include/amdblocks/root_complex.h
View File

@ -15,6 +15,11 @@
#define NON_PCI_RES_IDX_AUTO 0
struct domain_iohc_info {
uint16_t fabric_id;
uint32_t misc_smn_base;
};
struct non_pci_mmio_reg {
uint32_t iohc_misc_offset;
uint64_t mask;
@ -27,6 +32,7 @@ void read_non_pci_resources(struct device *domain, unsigned long *idx);
void read_soc_memmap_resources(struct device *domain, unsigned long *idx);
uint32_t get_iohc_misc_smn_base(struct device *domain);
const struct domain_iohc_info *get_iohc_info(size_t *count);
const struct non_pci_mmio_reg *get_iohc_non_pci_mmio_regs(size_t *count);
signed int get_iohc_fabric_id(struct device *domain);

1
src/soc/amd/common/block/root_complex/Makefile.mk
View File

@ -3,5 +3,6 @@ ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_ROOT_COMPLEX),y)
ramstage-y += ioapic.c
ramstage-y += non_pci_resources.c
ramstage-y += root_complex.c
endif # CONFIG_SOC_AMD_COMMON_BLOCK_ROOT_COMPLEX

43
src/soc/amd/common/block/root_complex/root_complex.c Normal file
View File

@ -0,0 +1,43 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <amdblocks/root_complex.h>
#include <console/console.h>
#include <device/device.h>
#include <types.h>
static const struct domain_iohc_info *get_domain_iohc_info(struct device *domain)
{
const unsigned int domain_id = domain->path.domain.domain;
const struct domain_iohc_info *iohc;
size_t iohc_count;
iohc = get_iohc_info(&iohc_count);
if (domain_id < iohc_count) {
return &iohc[domain_id];
} else {
printk(BIOS_ERR, "Invalid domain 0x%x with no corresponding IOHC device.\n",
domain_id);
return NULL;
}
}
uint32_t get_iohc_misc_smn_base(struct device *domain)
{
const struct domain_iohc_info *iohc_info = get_domain_iohc_info(domain);
if (iohc_info)
return iohc_info->misc_smn_base;
else
return 0;
}
signed int get_iohc_fabric_id(struct device *domain)
{
const struct domain_iohc_info *iohc_info = get_domain_iohc_info(domain);
if (iohc_info)
return iohc_info->fabric_id;
else
return -1;
}

55
src/soc/amd/genoa_poc/root_complex.c
View File

@ -2,26 +2,31 @@
#include <amdblocks/ioapic.h>
#include <amdblocks/root_complex.h>
#include <console/console.h>
#include <device/device.h>
#include <types.h>
uint32_t get_iohc_misc_smn_base(struct device *domain)
static const struct domain_iohc_info iohc_info[] = {
[0] = {
.fabric_id = 0x22,
.misc_smn_base = SMN_IOHC_MISC_BASE_13C1,
},
[1] = {
.fabric_id = 0x23,
.misc_smn_base = SMN_IOHC_MISC_BASE_13B1,
},
[2] = {
.fabric_id = 0x21,
.misc_smn_base = SMN_IOHC_MISC_BASE_13E1,
},
[3] = {
.fabric_id = 0x20,
.misc_smn_base = SMN_IOHC_MISC_BASE_13D1,
},
};
const struct domain_iohc_info *get_iohc_info(size_t *count)
{
switch (domain->path.domain.domain) {
case 0:
return SMN_IOHC_MISC_BASE_13C1;
case 1:
return SMN_IOHC_MISC_BASE_13B1;
case 2:
return SMN_IOHC_MISC_BASE_13E1;
case 3:
return SMN_IOHC_MISC_BASE_13D1;
default:
printk(BIOS_ERR, "Invalid domain 0x%x with no corresponding IOHC device.\n",
domain->path.domain.domain);
return 0;
}
*count = ARRAY_SIZE(iohc_info);
return iohc_info;
}
static const struct non_pci_mmio_reg non_pci_mmio[] = {
@ -44,19 +49,3 @@ const struct non_pci_mmio_reg *get_iohc_non_pci_mmio_regs(size_t *count)
*count = ARRAY_SIZE(non_pci_mmio);
return non_pci_mmio;
}
signed int get_iohc_fabric_id(struct device *domain)
{
switch (domain->path.domain.domain) {
case 0:
return 0x22;
case 1:
return 0x23;
case 2:
return 0x21;
case 3:
return 0x20;
default:
return -1;
}
}

22
src/soc/amd/glinda/root_complex.c
View File

@ -105,9 +105,17 @@ struct device_operations glinda_root_complex_operations = {
.acpi_fill_ssdt = root_complex_fill_ssdt,
};
uint32_t get_iohc_misc_smn_base(struct device *domain)
static const struct domain_iohc_info iohc_info[] = {
[0] = {
.fabric_id = IOMS0_FABRIC_ID,
.misc_smn_base = SMN_IOHC_MISC_BASE_13B1,
},
};
const struct domain_iohc_info *get_iohc_info(size_t *count)
{
return SMN_IOHC_MISC_BASE_13B1;
*count = ARRAY_SIZE(iohc_info);
return iohc_info;
}
static const struct non_pci_mmio_reg non_pci_mmio[] = {
@ -132,13 +140,3 @@ const struct non_pci_mmio_reg *get_iohc_non_pci_mmio_regs(size_t *count)
*count = ARRAY_SIZE(non_pci_mmio);
return non_pci_mmio;
}
signed int get_iohc_fabric_id(struct device *domain)
{
switch (domain->path.domain.domain) {
case 0:
return IOMS0_FABRIC_ID;
default:
return -1;
}
}

22
src/soc/amd/mendocino/root_complex.c
View File

@ -266,9 +266,17 @@ struct device_operations mendocino_root_complex_operations = {
.acpi_fill_ssdt = root_complex_fill_ssdt,
};
uint32_t get_iohc_misc_smn_base(struct device *domain)
static const struct domain_iohc_info iohc_info[] = {
[0] = {
.fabric_id = IOMS0_FABRIC_ID,
.misc_smn_base = SMN_IOHC_MISC_BASE_13B1,
},
};
const struct domain_iohc_info *get_iohc_info(size_t *count)
{
return SMN_IOHC_MISC_BASE_13B1;
*count = ARRAY_SIZE(iohc_info);
return iohc_info;
}
static const struct non_pci_mmio_reg non_pci_mmio[] = {
@ -290,13 +298,3 @@ const struct non_pci_mmio_reg *get_iohc_non_pci_mmio_regs(size_t *count)
*count = ARRAY_SIZE(non_pci_mmio);
return non_pci_mmio;
}
signed int get_iohc_fabric_id(struct device *domain)
{
switch (domain->path.domain.domain) {
case 0:
return IOMS0_FABRIC_ID;
default:
return -1;
}
}

22
src/soc/amd/phoenix/root_complex.c
View File

@ -105,9 +105,17 @@ struct device_operations phoenix_root_complex_operations = {
.acpi_fill_ssdt = root_complex_fill_ssdt,
};
uint32_t get_iohc_misc_smn_base(struct device *domain)
static const struct domain_iohc_info iohc_info[] = {
[0] = {
.fabric_id = IOMS0_FABRIC_ID,
.misc_smn_base = SMN_IOHC_MISC_BASE_13B1,
},
};
const struct domain_iohc_info *get_iohc_info(size_t *count)
{
return SMN_IOHC_MISC_BASE_13B1;
*count = ARRAY_SIZE(iohc_info);
return iohc_info;
}
static const struct non_pci_mmio_reg non_pci_mmio[] = {
@ -132,13 +140,3 @@ const struct non_pci_mmio_reg *get_iohc_non_pci_mmio_regs(size_t *count)
*count = ARRAY_SIZE(non_pci_mmio);
return non_pci_mmio;
}
signed int get_iohc_fabric_id(struct device *domain)
{
switch (domain->path.domain.domain) {
case 0:
return IOMS0_FABRIC_ID;
default:
return -1;
}
}

22
src/soc/amd/picasso/root_complex.c
View File

@ -84,9 +84,17 @@ struct device_operations picasso_root_complex_operations = {
.acpi_fill_ssdt = root_complex_fill_ssdt,
};
uint32_t get_iohc_misc_smn_base(struct device *domain)
static const struct domain_iohc_info iohc_info[] = {
[0] = {
.fabric_id = IOMS0_FABRIC_ID,
.misc_smn_base = SMN_IOHC_MISC_BASE_13B1,
},
};
const struct domain_iohc_info *get_iohc_info(size_t *count)
{
return SMN_IOHC_MISC_BASE_13B1;
*count = ARRAY_SIZE(iohc_info);
return iohc_info;
}
static const struct non_pci_mmio_reg non_pci_mmio[] = {
@ -107,13 +115,3 @@ const struct non_pci_mmio_reg *get_iohc_non_pci_mmio_regs(size_t *count)
*count = ARRAY_SIZE(non_pci_mmio);
return non_pci_mmio;
}
signed int get_iohc_fabric_id(struct device *domain)
{
switch (domain->path.domain.domain) {
case 0:
return IOMS0_FABRIC_ID;
default:
return -1;
}
}