mb/google/volteer: Define stop_gpio for goodix touch screen

This applies to the goodix touch screen on both the volteer and
volteer2 variants: Define GPP_E3 as the stop_gpio for the touch screen
"Report_Switch" signal. Goodix defines a 1ms (minimum) delay after
stop off. In addition, no longer drive this GPIO high by default as it
is now controlled by the kernel through ACPI.

BUG=b:153705232
TEST=touch screen still functional on volteer; confirmed timings with
	scope (VDD, RESET, REPORT_SWITCH)

Change-Id: I3ead9cf79812d08c4917be4585ed273050465a9b
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44356
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Caveh Jalali
2020-08-06 00:55:40 -07:00
committed by Patrick Georgi
parent ac66bda47c
commit eb9337c9cc
4 changed files with 14 additions and 2 deletions

View File

@@ -102,7 +102,7 @@ static const struct pad_config override_gpio_table[] = {
/* E2 : SPI1_IO3 ==> WLAN_PCIE_WAKE_ODL */
PAD_CFG_GPI(GPP_E2, NONE, DEEP),
/* E3 : CPU_GP0 ==> USI_REPORT_EN */
PAD_CFG_GPO(GPP_E3, 1, DEEP),
PAD_CFG_GPO(GPP_E3, 0, DEEP),
/* E7 : CPU_GP1 ==> USI_INT */
PAD_CFG_GPI_APIC(GPP_E7, NONE, PLTRST, LEVEL, NONE),
/* E8 : SPI1_CS1# ==> SLP_S0IX */

View File

@@ -89,10 +89,16 @@ chip soc/intel/tigerlake
register "generic.probed" = "1"
register "generic.reset_gpio" =
"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C10)"
# Parameter T3 >= 10ms
register "generic.reset_delay_ms" = "120"
# Parameter T2 >= 1ms
register "generic.reset_off_delay_ms" = "3"
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A8)"
# Parameter T1 >= 10ms
register "generic.enable_delay_ms" = "12"
register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E3)"
# Parameter T4 >= 1ms
register "generic.stop_off_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 14 on end

View File

@@ -102,7 +102,7 @@ static const struct pad_config override_gpio_table[] = {
/* E2 : SPI1_IO3 ==> WLAN_PCIE_WAKE_ODL */
PAD_CFG_GPI(GPP_E2, NONE, DEEP),
/* E3 : CPU_GP0 ==> USI_REPORT_EN */
PAD_CFG_GPO(GPP_E3, 1, DEEP),
PAD_CFG_GPO(GPP_E3, 0, DEEP),
/* E7 : CPU_GP1 ==> USI_INT */
PAD_CFG_GPI_APIC(GPP_E7, NONE, PLTRST, LEVEL, NONE),
/* E8 : SPI1_CS1# ==> SLP_S0IX */

View File

@@ -45,10 +45,16 @@ chip soc/intel/tigerlake
register "generic.probed" = "1"
register "generic.reset_gpio" =
"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C10)"
# Parameter T3 >= 10ms
register "generic.reset_delay_ms" = "120"
# Parameter T2 >= 1ms
register "generic.reset_off_delay_ms" = "3"
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A8)"
# Parameter T1 >= 10ms
register "generic.enable_delay_ms" = "12"
register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E3)"
# Parameter T4 >= 1ms
register "generic.stop_off_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 14 on end