mb/system76/tgl-u: Enable reporting CPU C10 state over ESPI

Change-Id: Ia811187df194af596eeea7d4fd7be0de5fa9254c

src/mainboard/system76/tgl-u/variants/darp7/ramstage.c

@@ -12,4 +12,7 @@ void mainboard_silicon_init_params(FSP_S_CONFIG *params)
 	// IOM config
 	params->PchUsbOverCurrentEnable = 0;
 	params->PortResetMessageEnable[5] = 1; // J_TYPEC2
+
+	// Enable reporting CPU C10 state over ESPI
+	params->PchEspiHostC10ReportEnable = 1;
 }

src/mainboard/system76/tgl-u/variants/galp5/ramstage.c

@@ -12,4 +12,7 @@ void mainboard_silicon_init_params(FSP_S_CONFIG *params)
 	// IOM config
 	params->PchUsbOverCurrentEnable = 0;
 	params->PortResetMessageEnable[5] = 1; // J_TYPEC2
+
+	// Enable reporting CPU C10 state over ESPI
+	params->PchEspiHostC10ReportEnable = 1;
 }

src/mainboard/system76/tgl-u/variants/lemp10/ramstage.c

@@ -12,4 +12,7 @@ void mainboard_silicon_init_params(FSP_S_CONFIG *params)
 	// IOM config
 	params->PchUsbOverCurrentEnable = 0;
 	params->PortResetMessageEnable[2] = 1; // J_TYPEC1
+
+	// Enable reporting CPU C10 state over ESPI
+	params->PchEspiHostC10ReportEnable = 1;
 }