AMD Socket ASB2 and AM3 support.

Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5482 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Zheng Bao
2010-04-23 17:35:37 +00:00
committed by Stefan Reinauer
parent eb75f652d3
commit eedf7a646c
15 changed files with 594 additions and 41 deletions

View File

@ -0,0 +1,47 @@
config CPU_AMD_SOCKET_AM3
bool
select CPU_AMD_MODEL_10XXX
select HT3_SUPPORT
select PCI_IO_CFG_EXT
config CPU_SOCKET_TYPE
hex
default 0x11
depends on CPU_AMD_SOCKET_AM3
# DDR3 and REG
config DIMM_SUPPORT
hex
default 0x0005
depends on CPU_AMD_SOCKET_AM3
config EXT_RT_TBL_SUPPORT
bool
default n
depends on CPU_AMD_SOCKET_AM3
config EXT_CONF_SUPPORT
bool
default n
depends on CPU_AMD_SOCKET_AM3
config CBB
hex
default 0x0
depends on CPU_AMD_SOCKET_AM3
config CDB
hex
default 0x18
depends on CPU_AMD_SOCKET_AM3
config XIP_ROM_BASE
hex
default 0xfff80000
depends on CPU_AMD_SOCKET_AM3
config XIP_ROM_SIZE
hex
default 0x80000
depends on CPU_AMD_SOCKET_AM3

View File

@ -0,0 +1,13 @@
obj-y += socket_AM3.o
subdirs-y += ../model_10xxx
subdirs-y += ../quadcore
subdirs-y += ../mtrr
subdirs-y += ../microcode
subdirs-y += ../../x86/tsc
subdirs-y += ../../x86/lapic
subdirs-y += ../../x86/cache
subdirs-y += ../../x86/pae
subdirs-y += ../../x86/smm
subdirs-y += ../../x86/mtrr
cpu_incs += $(src)/cpu/amd/car/cache_as_ram.inc

View File

@ -0,0 +1,23 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2010 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
extern struct chip_operations cpu_amd_socket_AM3_ops;
struct cpu_amd_socket_AM3_config {
};

View File

@ -0,0 +1,25 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2010 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <device/device.h>
#include "chip.h"
struct chip_operations cpu_amd_socket_AM3_ops = {
CHIP_NAME("socket AM3")
};