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mb/google/volteer/variants/drobit: Add Charger Performance Control table TCHG for DPTF setting.

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Add Charger Performance Control table TCHG for DPTF setting.

BUG=b:194256990
BRANCH=firmware-volteer-13672.B
TEST=build test firmware and verified by thermal team.

Change-Id: I9dba3f0e75d07d8ee9656bd1ee8d6de2d3b8c152
Signed-off-by: Wayne3 Wang <Wayne3_Wang@pegatron.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56500
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Ariel Chang <ariel_chang@pegatron.corp-partner.google.com>
Reviewed-by: Paul F Yang <paul.f.yang@intel.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Wayne3 Wang <wayne3_wang@pegatron.corp-partner.google.com>
This commit is contained in:
Wayne3 Wang
2021-07-22 11:09:16 +08:00
committed by Tim Wawrzynczak
parent a4422b84fd
commit eef34ef2ee
1 changed files with 8 additions and 0 deletions
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8
src/mainboard/google/volteer/variants/drobit/overridetree.cb
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@ -102,6 +102,14 @@ chip soc/intel/tigerlake
register "options.fan.fine_grained_control" = "1"
register "options.fan.step_size" = "2"
## Charger Performance Control (Control, mA)
register "controls.charger_perf" = "{
[0] = { 32, 2048 },
[1] = { 29, 1856 },
[2] = { 26, 1664 },
[3] = { 23, 1472 }
}"
device generic 0 on end
end
end # DPTF