drivers/aspeed/common: Add support for high resolution framebuffer
* Implement reading EDID over software I2C. * Fall back to VGA if no monitor connected for BMC KVM * Copy the linux kernel code and add a bunch of wrapper structs to make it compile. * Convert the EDID to a drm_display_mode, which is understood by the driver. * Properly select HAVE_LINEAR_FRAMEBUFFER and HAVE_VGA_TEXT_FRAMEBUFFER Tested on Supermicro X11SSH-TF using FullHD VGA monitor. Initializes the graphics in about 1 second, which is twice as fast as the VGA Option ROM. The framebuffer is advertised and working in tianocore. Change-Id: I7803566b64158405efc04a39f80a0ec98b44e646 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35726 Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Patrick Rudolph
committed by
Patrick Rudolph
Patrick Rudolph
parent
199f98bc43
commit
f1a4ae0a48
@@ -1,5 +1,4 @@
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config DRIVERS_ASPEED_AST2050
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bool
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select DRIVERS_ASPEED_AST_COMMON
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select HAVE_VGA_TEXT_FRAMEBUFFER
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select MAINBOARD_HAS_NATIVE_VGA_INIT
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@@ -48,13 +48,19 @@ static void aspeed_ast2050_init(struct device *dev)
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outb(0xa6, 0x3d4); outb(0x2f, 0x3d5);
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outb(0xa7, 0x3d4); outb(0x3f, 0x3d5);
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/* Initialize standard VGA text mode */
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vga_io_init();
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vga_textmode_init();
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printk(BIOS_INFO, "ASpeed VGA text mode initialized\n");
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if (CONFIG(VGA_TEXT_FRAMEBUFFER)) {
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/* Initialize standard VGA text mode */
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vga_io_init();
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/* if we don't have console, at least print something... */
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vga_line_write(0, "ASpeed VGA text mode initialized");
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vga_textmode_init();
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printk(BIOS_INFO, "ASpeed VGA text mode initialized\n");
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/* if we don't have console, at least print something... */
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vga_line_write(0, "ASpeed VGA text mode initialized");
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} else if (CONFIG(GENERIC_LINEAR_FRAMEBUFFER)) {
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ast_driver_framebuffer_init(&drm_dev, 0);
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printk(BIOS_INFO, "ASpeed high resolution framebuffer initialized\n");
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}
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}
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static struct device_operations aspeed_ast2050_ops = {
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@@ -1,3 +1,6 @@
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config DRIVERS_ASPEED_AST_COMMON
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bool
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select VGA
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select HAVE_LINEAR_FRAMEBUFFER if MAINBOARD_DO_NATIVE_VGA_INIT
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select HAVE_VGA_TEXT_FRAMEBUFFER if MAINBOARD_DO_NATIVE_VGA_INIT
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select VGA if VGA_TEXT_FRAMEBUFFER
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select SOFTWARE_I2C if GENERIC_LINEAR_FRAMEBUFFER
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@@ -1 +1,4 @@
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ramstage-$(CONFIG_DRIVERS_ASPEED_AST_COMMON) += ast_dp501.c ast_main.c ast_post.c
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ifeq ($(CONFIG_DRIVERS_ASPEED_AST_COMMON),y)
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ramstage-y += ast_dp501.c ast_main.c ast_post.c
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ramstage-$(CONFIG_GENERIC_LINEAR_FRAMEBUFFER) += ast_mode.c ast_i2c.c ast_mode_corebootfb.c
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endif
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@@ -46,6 +46,7 @@ enum ast_chip {
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AST2150,
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AST2300,
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AST2400,
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AST2500,
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AST1180,
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};
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@@ -192,6 +193,8 @@ static inline void ast_open_key(struct ast_private *ast)
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#define AST_HWC_SIZE (AST_MAX_HWC_WIDTH*AST_MAX_HWC_HEIGHT*2)
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#define AST_HWC_SIGNATURE_SIZE 32
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#define EINVAL 22 /* Invalid argument */
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#define AST_DEFAULT_HWC_NUM 2
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/* define for signature structure */
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#define AST_HWC_SIGNATURE_CHECKSUM 0x00
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@@ -202,6 +205,99 @@ static inline void ast_open_key(struct ast_private *ast)
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#define AST_HWC_SIGNATURE_HOTSPOTX 0x14
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#define AST_HWC_SIGNATURE_HOTSPOTY 0x18
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/* ast_mode.c stuff */
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struct ast_vbios_stdtable {
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u8 misc;
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u8 seq[4];
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u8 crtc[25];
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u8 ar[20];
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u8 gr[9];
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};
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struct ast_vbios_enhtable {
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u32 ht;
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u32 hde;
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u32 hfp;
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u32 hsync;
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u32 vt;
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u32 vde;
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u32 vfp;
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u32 vsync;
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u32 dclk_index;
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u32 flags;
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u32 refresh_rate;
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u32 refresh_rate_index;
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u32 mode_id;
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};
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struct ast_vbios_dclk_info {
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u8 param1;
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u8 param2;
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u8 param3;
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};
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struct ast_vbios_mode_info {
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const struct ast_vbios_stdtable *std_table;
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const struct ast_vbios_enhtable *enh_table;
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};
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#define DRM_MODE_FLAG_NVSYNC 1
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#define DRM_MODE_FLAG_PVSYNC 2
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#define DRM_MODE_FLAG_NHSYNC 4
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#define DRM_MODE_FLAG_PHSYNC 8
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struct drm_display_mode {
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/* Proposed mode values */
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u16 vrefresh; /* in Hz */
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u32 clock;
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u16 hdisplay;
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u16 vdisplay;
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u32 flags;
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/* Actual mode we give to hw */
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u16 crtc_hdisplay;
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u16 crtc_htotal;
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u16 crtc_hblank_start;
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u16 crtc_hblank_end;
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u16 crtc_hsync_start;
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u16 crtc_hsync_end;
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u16 crtc_vtotal;
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u16 crtc_vsync_start;
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u16 crtc_vsync_end;
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u16 crtc_vdisplay;
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u16 crtc_vblank_start;
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u16 crtc_vblank_end;
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};
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struct drm_format {
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u32 cpp[1]; /* Colors per pixel */
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};
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struct drm_framebuffer {
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u32 pitches[1];
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struct drm_format *format;
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u32 mmio_addr;
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};
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struct drm_primary {
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struct drm_framebuffer *fb;
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};
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struct drm_crtc {
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struct drm_device *dev;
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struct drm_primary *primary;
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struct drm_display_mode mode;
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};
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struct drm_connector {
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struct drm_device *dev;
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};
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enum drm_mode_status {
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MODE_NOMODE,
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MODE_OK
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};
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#define AST_MM_ALIGN_SHIFT 4
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#define AST_MM_ALIGN_MASK ((1 << AST_MM_ALIGN_SHIFT) - 1)
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@@ -222,4 +318,23 @@ bool ast_backup_fw(struct drm_device *dev, u8 *addr, u32 size);
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bool ast_dp501_read_edid(struct drm_device *dev, u8 *ediddata);
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u8 ast_get_dp501_max_clk(struct drm_device *dev);
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void ast_init_3rdtx(struct drm_device *dev);
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/* ast mode */
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int ast_crtc_mode_set(struct drm_crtc *crtc,
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struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode);
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enum drm_mode_status ast_mode_valid(struct drm_connector *connector,
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const unsigned int hdisplay,
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const unsigned int vdisplay);
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void ast_hide_cursor(struct drm_crtc *crtc);
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void ast_set_offset_reg(struct drm_crtc *crtc);
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void ast_set_start_address_crt1(struct ast_private *ast, u32 offset);
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/* ast_mode_corebootfb */
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int ast_driver_framebuffer_init(struct drm_device *dev, int flags);
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int ast_crtc_do_set_base(struct drm_crtc *crtc);
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/* ast i2c */
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int ast_software_i2c_read(struct ast_private *ast_priv, uint8_t edid[128]);
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#endif
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140
src/drivers/aspeed/common/ast_i2c.c
Normal file
140
src/drivers/aspeed/common/ast_i2c.c
Normal file
@@ -0,0 +1,140 @@
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/*
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* Copied from Linux drivers/gpu/drm/ast/ast_mode.c
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*
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* Copyright 2012 Red Hat Inc.
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* Parts based on xf86-video-ast
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* Copyright (c) 2005 ASPEED Technology Inc.
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* Copyright Dave Airlie <airlied@redhat.com>
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* Copyright 2019 9Elements Agency GmbH <patrick.rudolph@9elements.com>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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*/
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#include <delay.h>
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#include <device/i2c_simple.h>
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#include "ast_drv.h"
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static struct ast_private *ast;
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#define _GET_INDEX_REG(x) ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, (x))
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#define ASPEED_BUS 0
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static int get_clock(unsigned int bus)
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{
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uint32_t val, val2, count, pass;
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count = 0;
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pass = 0;
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val = (_GET_INDEX_REG(0x10) >> 4) & 0x01;
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do {
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val2 = (_GET_INDEX_REG(0x10) >> 4) & 0x01;
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if (val == val2) {
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pass++;
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} else {
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pass = 0;
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val = (_GET_INDEX_REG(0x10) >> 4) & 0x01;
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}
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} while ((pass < 5) && (count++ < 0x10000));
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return val & 1 ? 1 : 0;
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}
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static int get_data(unsigned int bus)
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{
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uint32_t val, val2, count, pass;
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count = 0;
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pass = 0;
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val = (_GET_INDEX_REG(0x20) >> 5) & 0x01;
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do {
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val2 = (_GET_INDEX_REG(0x20) >> 5) & 0x01;
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if (val == val2) {
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pass++;
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} else {
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pass = 0;
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val = (_GET_INDEX_REG(0x20) >> 5) & 0x01;
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}
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} while ((pass < 5) && (count++ < 0x10000));
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return val & 1 ? 1 : 0;
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}
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static void set_clock(unsigned int bus, int clock)
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{
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int i;
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u8 ujcrb7, jtemp;
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for (i = 0; i < 0x10000; i++) {
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ujcrb7 = ((clock & 0x01) ? 0 : 1);
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ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0xf4, ujcrb7);
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jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x01);
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if (ujcrb7 == jtemp)
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break;
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}
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}
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static void set_data(unsigned int bus, int data)
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{
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int i;
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u8 ujcrb7, jtemp;
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for (i = 0; i < 0x10000; i++) {
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ujcrb7 = ((data & 0x01) ? 0 : 1) << 2;
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ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0xf1, ujcrb7);
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jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x04);
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if (ujcrb7 == jtemp)
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break;
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}
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}
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static struct software_i2c_ops ast_ops = {
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.set_sda = set_data,
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.set_scl = set_clock,
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.get_sda = get_data,
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.get_scl = get_clock,
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};
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int ast_software_i2c_read(struct ast_private *ast_priv, uint8_t edid[128])
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{
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struct software_i2c_ops *backup;
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int ret;
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backup = software_i2c[ASPEED_BUS];
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software_i2c[ASPEED_BUS] = &ast_ops;
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ast = ast_priv;
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/* Ast POST pulled SDA and SCL low, recover the bus to a known state */
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set_clock(ASPEED_BUS, 1);
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set_data(ASPEED_BUS, 1);
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udelay(100);
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/* Need to reset internal EEPROM counter to 0 */
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ret = i2c_read_bytes(ASPEED_BUS, 0x50, 0, edid, 128);
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software_i2c[ASPEED_BUS] = backup;
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return ret;
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}
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601
src/drivers/aspeed/common/ast_mode.c
Normal file
601
src/drivers/aspeed/common/ast_mode.c
Normal file
@@ -0,0 +1,601 @@
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/*
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* Copied from Linux drivers/gpu/drm/ast/ast_mode.c
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*
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* Copyright 2012 Red Hat Inc.
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* Parts based on xf86-video-ast
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* Copyright (c) 2005 ASPEED Technology Inc.
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* Copyright Dave Airlie <airlied@redhat.com>
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* Copyright 2019 9Elements Agency GmbH <patrick.rudolph@9elements.com>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
|
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* copy of this software and associated documentation files (the
|
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* "Software"), to deal in the Software without restriction, including
|
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* without limitation the rights to use, copy, modify, merge, publish,
|
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* distribute, sub license, and/or sell copies of the Software, and to
|
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* permit persons to whom the Software is furnished to do so, subject to
|
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* the following conditions:
|
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
|
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* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
|
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
|
||||
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
|
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
|
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*
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* The above copyright notice and this permission notice (including the
|
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* next paragraph) shall be included in all copies or substantial portions
|
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* of the Software.
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*
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* Please try to keep as close as possible to the upstream source.
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*/
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#include "ast_drv.h"
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#include "ast_tables.h"
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static inline void ast_load_palette_index(struct ast_private *ast,
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u8 index, u8 red, u8 green,
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u8 blue)
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{
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ast_io_write8(ast, AST_IO_DAC_INDEX_WRITE, index);
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ast_io_read8(ast, AST_IO_SEQ_PORT);
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ast_io_write8(ast, AST_IO_DAC_DATA, red);
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ast_io_read8(ast, AST_IO_SEQ_PORT);
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ast_io_write8(ast, AST_IO_DAC_DATA, green);
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ast_io_read8(ast, AST_IO_SEQ_PORT);
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ast_io_write8(ast, AST_IO_DAC_DATA, blue);
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ast_io_read8(ast, AST_IO_SEQ_PORT);
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}
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static void ast_crtc_load_lut(struct drm_crtc *crtc)
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{
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struct ast_private *ast = crtc->dev->dev_private;
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/* FIXME: Gamma cor 2.6 ? */
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for (int i = 0; i < 256; i++)
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ast_load_palette_index(ast, i, i, i, i);
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}
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static bool ast_get_vbios_mode_info(struct drm_crtc *crtc, struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode,
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struct ast_vbios_mode_info *vbios_mode)
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{
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struct ast_private *ast = crtc->dev->dev_private;
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const struct drm_framebuffer *fb = crtc->primary->fb;
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u32 refresh_rate_index = 0, mode_id, color_index, refresh_rate;
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const struct ast_vbios_enhtable *best = NULL;
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u32 hborder, vborder;
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bool check_sync;
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switch (fb->format->cpp[0] * 8) {
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case 8:
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vbios_mode->std_table = &vbios_stdtable[VGAModeIndex];
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color_index = VGAModeIndex - 1;
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break;
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case 16:
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vbios_mode->std_table = &vbios_stdtable[HiCModeIndex];
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color_index = HiCModeIndex;
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break;
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case 24:
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case 32:
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vbios_mode->std_table = &vbios_stdtable[TrueCModeIndex];
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color_index = TrueCModeIndex;
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break;
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default:
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return false;
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}
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switch (crtc->mode.crtc_hdisplay) {
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case 640:
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vbios_mode->enh_table = &res_640x480[refresh_rate_index];
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break;
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case 800:
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vbios_mode->enh_table = &res_800x600[refresh_rate_index];
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break;
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case 1024:
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vbios_mode->enh_table = &res_1024x768[refresh_rate_index];
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break;
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case 1280:
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if (crtc->mode.crtc_vdisplay == 800)
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vbios_mode->enh_table = &res_1280x800[refresh_rate_index];
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else
|
||||
vbios_mode->enh_table = &res_1280x1024[refresh_rate_index];
|
||||
break;
|
||||
case 1360:
|
||||
vbios_mode->enh_table = &res_1360x768[refresh_rate_index];
|
||||
break;
|
||||
case 1440:
|
||||
vbios_mode->enh_table = &res_1440x900[refresh_rate_index];
|
||||
break;
|
||||
case 1600:
|
||||
if (crtc->mode.crtc_vdisplay == 900)
|
||||
vbios_mode->enh_table = &res_1600x900[refresh_rate_index];
|
||||
else
|
||||
vbios_mode->enh_table = &res_1600x1200[refresh_rate_index];
|
||||
break;
|
||||
case 1680:
|
||||
vbios_mode->enh_table = &res_1680x1050[refresh_rate_index];
|
||||
break;
|
||||
case 1920:
|
||||
if (crtc->mode.crtc_vdisplay == 1080)
|
||||
vbios_mode->enh_table = &res_1920x1080[refresh_rate_index];
|
||||
else
|
||||
vbios_mode->enh_table = &res_1920x1200[refresh_rate_index];
|
||||
break;
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
|
||||
refresh_rate = mode->vrefresh;
|
||||
check_sync = vbios_mode->enh_table->flags & WideScreenMode;
|
||||
do {
|
||||
const struct ast_vbios_enhtable *loop = vbios_mode->enh_table;
|
||||
|
||||
while (loop->refresh_rate != 0xff) {
|
||||
if ((check_sync) &&
|
||||
(((mode->flags & DRM_MODE_FLAG_NVSYNC) &&
|
||||
(loop->flags & PVSync)) ||
|
||||
((mode->flags & DRM_MODE_FLAG_PVSYNC) &&
|
||||
(loop->flags & NVSync)) ||
|
||||
((mode->flags & DRM_MODE_FLAG_NHSYNC) &&
|
||||
(loop->flags & PHSync)) ||
|
||||
((mode->flags & DRM_MODE_FLAG_PHSYNC) &&
|
||||
(loop->flags & NHSync)))) {
|
||||
loop++;
|
||||
continue;
|
||||
}
|
||||
if (loop->refresh_rate <= refresh_rate
|
||||
&& (!best || loop->refresh_rate > best->refresh_rate))
|
||||
best = loop;
|
||||
loop++;
|
||||
}
|
||||
if (best || !check_sync)
|
||||
break;
|
||||
check_sync = 0;
|
||||
} while (1);
|
||||
if (best)
|
||||
vbios_mode->enh_table = best;
|
||||
|
||||
hborder = (vbios_mode->enh_table->flags & HBorder) ? 8 : 0;
|
||||
vborder = (vbios_mode->enh_table->flags & VBorder) ? 8 : 0;
|
||||
|
||||
adjusted_mode->crtc_htotal = vbios_mode->enh_table->ht;
|
||||
adjusted_mode->crtc_hblank_start = vbios_mode->enh_table->hde + hborder;
|
||||
adjusted_mode->crtc_hblank_end = vbios_mode->enh_table->ht - hborder;
|
||||
adjusted_mode->crtc_hsync_start = vbios_mode->enh_table->hde + hborder +
|
||||
vbios_mode->enh_table->hfp;
|
||||
adjusted_mode->crtc_hsync_end = (vbios_mode->enh_table->hde + hborder +
|
||||
vbios_mode->enh_table->hfp +
|
||||
vbios_mode->enh_table->hsync);
|
||||
|
||||
adjusted_mode->crtc_vtotal = vbios_mode->enh_table->vt;
|
||||
adjusted_mode->crtc_vblank_start = vbios_mode->enh_table->vde + vborder;
|
||||
adjusted_mode->crtc_vblank_end = vbios_mode->enh_table->vt - vborder;
|
||||
adjusted_mode->crtc_vsync_start = vbios_mode->enh_table->vde + vborder +
|
||||
vbios_mode->enh_table->vfp;
|
||||
adjusted_mode->crtc_vsync_end = (vbios_mode->enh_table->vde + vborder +
|
||||
vbios_mode->enh_table->vfp +
|
||||
vbios_mode->enh_table->vsync);
|
||||
|
||||
refresh_rate_index = vbios_mode->enh_table->refresh_rate_index;
|
||||
mode_id = vbios_mode->enh_table->mode_id;
|
||||
|
||||
if (ast->chip == AST1180) {
|
||||
/* TODO 1180 */
|
||||
} else {
|
||||
ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8c, (u8)((color_index & 0xf) << 4));
|
||||
ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8d, refresh_rate_index & 0xff);
|
||||
ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8e, mode_id & 0xff);
|
||||
|
||||
ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0x00);
|
||||
if (vbios_mode->enh_table->flags & NewModeInfo) {
|
||||
ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0xa8);
|
||||
ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x92,
|
||||
fb->format->cpp[0] * 8);
|
||||
ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x93,
|
||||
adjusted_mode->clock / 1000);
|
||||
ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x94,
|
||||
adjusted_mode->crtc_hdisplay);
|
||||
ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x95,
|
||||
adjusted_mode->crtc_hdisplay >> 8);
|
||||
|
||||
ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x96,
|
||||
adjusted_mode->crtc_vdisplay);
|
||||
ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x97,
|
||||
adjusted_mode->crtc_vdisplay >> 8);
|
||||
}
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
static void ast_set_std_reg(struct drm_crtc *crtc, struct drm_display_mode *mode,
|
||||
struct ast_vbios_mode_info *vbios_mode)
|
||||
{
|
||||
struct ast_private *ast = crtc->dev->dev_private;
|
||||
const struct drm_framebuffer *fb = crtc->primary->fb;
|
||||
const struct ast_vbios_stdtable *stdtable;
|
||||
u32 i;
|
||||
u8 jreg;
|
||||
|
||||
switch (fb->format->cpp[0] * 8) {
|
||||
case 8:
|
||||
stdtable = &vbios_stdtable[VGAModeIndex];
|
||||
break;
|
||||
case 16:
|
||||
stdtable = &vbios_stdtable[HiCModeIndex];
|
||||
break;
|
||||
case 24:
|
||||
case 32:
|
||||
stdtable = &vbios_stdtable[TrueCModeIndex];
|
||||
break;
|
||||
default:
|
||||
return;
|
||||
}
|
||||
|
||||
jreg = stdtable->misc;
|
||||
ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, jreg);
|
||||
|
||||
/* Set SEQ */
|
||||
ast_set_index_reg(ast, AST_IO_SEQ_PORT, 0x00, 0x03);
|
||||
for (i = 0; i < 4; i++) {
|
||||
jreg = stdtable->seq[i];
|
||||
if (!i)
|
||||
jreg |= 0x20;
|
||||
ast_set_index_reg(ast, AST_IO_SEQ_PORT, (i + 1), jreg);
|
||||
}
|
||||
|
||||
/* Set CRTC */
|
||||
ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x00);
|
||||
for (i = 0; i < 25; i++)
|
||||
ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, stdtable->crtc[i]);
|
||||
|
||||
/* set AR */
|
||||
jreg = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ);
|
||||
for (i = 0; i < 20; i++) {
|
||||
jreg = stdtable->ar[i];
|
||||
ast_io_write8(ast, AST_IO_AR_PORT_WRITE, (u8)i);
|
||||
ast_io_write8(ast, AST_IO_AR_PORT_WRITE, jreg);
|
||||
}
|
||||
ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x14);
|
||||
ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x00);
|
||||
|
||||
jreg = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ);
|
||||
ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x20);
|
||||
|
||||
/* Set GR */
|
||||
for (i = 0; i < 9; i++)
|
||||
ast_set_index_reg(ast, AST_IO_GR_PORT, i, stdtable->gr[i]);
|
||||
}
|
||||
|
||||
static void ast_set_crtc_reg(struct drm_crtc *crtc, struct drm_display_mode *mode,
|
||||
struct ast_vbios_mode_info *vbios_mode)
|
||||
{
|
||||
struct ast_private *ast = crtc->dev->dev_private;
|
||||
u8 jreg05 = 0, jreg07 = 0, jreg09 = 0, jregAC = 0, jregAD = 0, jregAE = 0;
|
||||
u16 temp, precache = 0;
|
||||
|
||||
if ((ast->chip == AST2500) &&
|
||||
(vbios_mode->enh_table->flags & AST2500PreCatchCRT))
|
||||
precache = 40;
|
||||
|
||||
ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x00);
|
||||
|
||||
temp = (mode->crtc_htotal >> 3) - 5;
|
||||
if (temp & 0x100)
|
||||
jregAC |= 0x01; /* HT D[8] */
|
||||
ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x00, 0x00, temp);
|
||||
|
||||
temp = (mode->crtc_hdisplay >> 3) - 1;
|
||||
if (temp & 0x100)
|
||||
jregAC |= 0x04; /* HDE D[8] */
|
||||
ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x01, 0x00, temp);
|
||||
|
||||
temp = (mode->crtc_hblank_start >> 3) - 1;
|
||||
if (temp & 0x100)
|
||||
jregAC |= 0x10; /* HBS D[8] */
|
||||
ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x02, 0x00, temp);
|
||||
|
||||
temp = ((mode->crtc_hblank_end >> 3) - 1) & 0x7f;
|
||||
if (temp & 0x20)
|
||||
jreg05 |= 0x80; /* HBE D[5] */
|
||||
if (temp & 0x40)
|
||||
jregAD |= 0x01; /* HBE D[5] */
|
||||
ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x03, 0xE0, (temp & 0x1f));
|
||||
|
||||
temp = ((mode->crtc_hsync_start-precache) >> 3) - 1;
|
||||
if (temp & 0x100)
|
||||
jregAC |= 0x40; /* HRS D[5] */
|
||||
ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x04, 0x00, temp);
|
||||
|
||||
temp = (((mode->crtc_hsync_end-precache) >> 3) - 1) & 0x3f;
|
||||
if (temp & 0x20)
|
||||
jregAD |= 0x04; /* HRE D[5] */
|
||||
ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x05, 0x60, (u8)((temp & 0x1f) | jreg05));
|
||||
|
||||
ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAC, 0x00, jregAC);
|
||||
ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAD, 0x00, jregAD);
|
||||
|
||||
/* vert timings */
|
||||
temp = (mode->crtc_vtotal) - 2;
|
||||
if (temp & 0x100)
|
||||
jreg07 |= 0x01;
|
||||
if (temp & 0x200)
|
||||
jreg07 |= 0x20;
|
||||
if (temp & 0x400)
|
||||
jregAE |= 0x01;
|
||||
ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x06, 0x00, temp);
|
||||
|
||||
temp = (mode->crtc_vsync_start) - 1;
|
||||
if (temp & 0x100)
|
||||
jreg07 |= 0x04;
|
||||
if (temp & 0x200)
|
||||
jreg07 |= 0x80;
|
||||
if (temp & 0x400)
|
||||
jregAE |= 0x08;
|
||||
ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x10, 0x00, temp);
|
||||
|
||||
temp = (mode->crtc_vsync_end - 1) & 0x3f;
|
||||
if (temp & 0x10)
|
||||
jregAE |= 0x20;
|
||||
if (temp & 0x20)
|
||||
jregAE |= 0x40;
|
||||
ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x70, temp & 0xf);
|
||||
|
||||
temp = mode->crtc_vdisplay - 1;
|
||||
if (temp & 0x100)
|
||||
jreg07 |= 0x02;
|
||||
if (temp & 0x200)
|
||||
jreg07 |= 0x40;
|
||||
if (temp & 0x400)
|
||||
jregAE |= 0x02;
|
||||
ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x12, 0x00, temp);
|
||||
|
||||
temp = mode->crtc_vblank_start - 1;
|
||||
if (temp & 0x100)
|
||||
jreg07 |= 0x08;
|
||||
if (temp & 0x200)
|
||||
jreg09 |= 0x20;
|
||||
if (temp & 0x400)
|
||||
jregAE |= 0x04;
|
||||
ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x15, 0x00, temp);
|
||||
|
||||
temp = mode->crtc_vblank_end - 1;
|
||||
if (temp & 0x100)
|
||||
jregAE |= 0x10;
|
||||
ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x16, 0x00, temp);
|
||||
|
||||
ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x07, 0x00, jreg07);
|
||||
ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x09, 0xdf, jreg09);
|
||||
ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAE, 0x00, (jregAE | 0x80));
|
||||
|
||||
if (precache)
|
||||
ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0x3f, 0x80);
|
||||
else
|
||||
ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0x3f, 0x00);
|
||||
|
||||
ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x80);
|
||||
}
|
||||
|
||||
void ast_set_offset_reg(struct drm_crtc *crtc)
|
||||
{
|
||||
struct ast_private *ast = crtc->dev->dev_private;
|
||||
const struct drm_framebuffer *fb = crtc->primary->fb;
|
||||
|
||||
u16 offset;
|
||||
|
||||
offset = fb->pitches[0] >> 3;
|
||||
ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x13, (offset & 0xff));
|
||||
ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xb0, (offset >> 8) & 0x3f);
|
||||
}
|
||||
|
||||
static void ast_set_dclk_reg(struct drm_device *dev, struct drm_display_mode *mode,
|
||||
struct ast_vbios_mode_info *vbios_mode)
|
||||
{
|
||||
struct ast_private *ast = dev->dev_private;
|
||||
const struct ast_vbios_dclk_info *clk_info;
|
||||
|
||||
if (ast->chip == AST2500)
|
||||
clk_info = &dclk_table_ast2500[vbios_mode->enh_table->dclk_index];
|
||||
else
|
||||
clk_info = &dclk_table[vbios_mode->enh_table->dclk_index];
|
||||
|
||||
ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc0, 0x00, clk_info->param1);
|
||||
ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc1, 0x00, clk_info->param2);
|
||||
ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xbb, 0x0f,
|
||||
(clk_info->param3 & 0xc0) |
|
||||
((clk_info->param3 & 0x3) << 4));
|
||||
}
|
||||
|
||||
static void ast_set_ext_reg(struct drm_crtc *crtc, struct drm_display_mode *mode,
|
||||
struct ast_vbios_mode_info *vbios_mode)
|
||||
{
|
||||
struct ast_private *ast = crtc->dev->dev_private;
|
||||
const struct drm_framebuffer *fb = crtc->primary->fb;
|
||||
u8 jregA0 = 0, jregA3 = 0, jregA8 = 0;
|
||||
|
||||
switch (fb->format->cpp[0] * 8) {
|
||||
case 8:
|
||||
jregA0 = 0x70;
|
||||
jregA3 = 0x01;
|
||||
jregA8 = 0x00;
|
||||
break;
|
||||
case 15:
|
||||
case 16:
|
||||
jregA0 = 0x70;
|
||||
jregA3 = 0x04;
|
||||
jregA8 = 0x02;
|
||||
break;
|
||||
case 24:
|
||||
case 32:
|
||||
jregA0 = 0x70;
|
||||
jregA3 = 0x08;
|
||||
jregA8 = 0x02;
|
||||
break;
|
||||
}
|
||||
|
||||
ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa0, 0x8f, jregA0);
|
||||
ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xf0, jregA3);
|
||||
ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa8, 0xfd, jregA8);
|
||||
|
||||
/* Set Threshold */
|
||||
if (ast->chip == AST2300 || ast->chip == AST2400 ||
|
||||
ast->chip == AST2500) {
|
||||
ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x78);
|
||||
ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x60);
|
||||
} else if (ast->chip == AST2100 ||
|
||||
ast->chip == AST1100 ||
|
||||
ast->chip == AST2200 ||
|
||||
ast->chip == AST2150) {
|
||||
ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x3f);
|
||||
ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x2f);
|
||||
} else {
|
||||
ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x2f);
|
||||
ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x1f);
|
||||
}
|
||||
}
|
||||
|
||||
static void ast_set_sync_reg(struct drm_device *dev, struct drm_display_mode *mode,
|
||||
struct ast_vbios_mode_info *vbios_mode)
|
||||
{
|
||||
struct ast_private *ast = dev->dev_private;
|
||||
u8 jreg;
|
||||
|
||||
jreg = ast_io_read8(ast, AST_IO_MISC_PORT_READ);
|
||||
jreg &= ~0xC0;
|
||||
if (vbios_mode->enh_table->flags & NVSync)
|
||||
jreg |= 0x80;
|
||||
if (vbios_mode->enh_table->flags & NHSync)
|
||||
jreg |= 0x40;
|
||||
ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, jreg);
|
||||
}
|
||||
|
||||
void ast_set_start_address_crt1(struct ast_private *ast, u32 offset)
|
||||
{
|
||||
u32 addr;
|
||||
|
||||
addr = offset >> 2;
|
||||
ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x0d, (u8)(addr & 0xff));
|
||||
ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x0c, (u8)((addr >> 8) & 0xff));
|
||||
ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xaf, (u8)((addr >> 16) & 0xff));
|
||||
}
|
||||
|
||||
void ast_hide_cursor(struct drm_crtc *crtc)
|
||||
{
|
||||
struct ast_private *ast = crtc->dev->dev_private;
|
||||
ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xcb, 0xfc, 0x00);
|
||||
}
|
||||
|
||||
int ast_crtc_mode_set(struct drm_crtc *crtc,
|
||||
struct drm_display_mode *mode,
|
||||
struct drm_display_mode *adjusted_mode)
|
||||
{
|
||||
struct drm_device *dev = crtc->dev;
|
||||
struct ast_private *ast = crtc->dev->dev_private;
|
||||
struct ast_vbios_mode_info vbios_mode;
|
||||
bool ret;
|
||||
int err;
|
||||
|
||||
if (ast->chip == AST1180) {
|
||||
dev_err(dev->pdev, "AST 1180 modesetting not supported\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* DPMS, set on */
|
||||
ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0);
|
||||
if (ast->tx_chip_type == AST_TX_DP501)
|
||||
ast_set_dp501_video_output(crtc->dev, 1);
|
||||
ast_crtc_load_lut(crtc);
|
||||
|
||||
/* Get mode */
|
||||
ret = ast_get_vbios_mode_info(crtc, mode, adjusted_mode, &vbios_mode);
|
||||
if (ret == false) {
|
||||
dev_err(dev->pdev, "Failed to find compatible vbios mode\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
ast_open_key(ast);
|
||||
|
||||
ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa1, 0xff, 0x04);
|
||||
|
||||
ast_set_std_reg(crtc, adjusted_mode, &vbios_mode);
|
||||
ast_set_crtc_reg(crtc, adjusted_mode, &vbios_mode);
|
||||
ast_set_offset_reg(crtc);
|
||||
ast_set_dclk_reg(dev, adjusted_mode, &vbios_mode);
|
||||
ast_set_ext_reg(crtc, adjusted_mode, &vbios_mode);
|
||||
ast_set_sync_reg(dev, adjusted_mode, &vbios_mode);
|
||||
|
||||
err = ast_crtc_do_set_base(crtc);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
/* Commit changes */
|
||||
|
||||
ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0);
|
||||
ast_crtc_load_lut(crtc);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
enum drm_mode_status ast_mode_valid(struct drm_connector *connector,
|
||||
const unsigned int hdisplay, const unsigned int vdisplay)
|
||||
{
|
||||
struct ast_private *ast = connector->dev->dev_private;
|
||||
int flags = MODE_NOMODE;
|
||||
uint32_t jtemp;
|
||||
|
||||
if (ast->support_wide_screen) {
|
||||
if ((hdisplay == 1680) && (vdisplay == 1050))
|
||||
return MODE_OK;
|
||||
if ((hdisplay == 1280) && (vdisplay == 800))
|
||||
return MODE_OK;
|
||||
if ((hdisplay == 1440) && (vdisplay == 900))
|
||||
return MODE_OK;
|
||||
if ((hdisplay == 1360) && (vdisplay == 768))
|
||||
return MODE_OK;
|
||||
if ((hdisplay == 1600) && (vdisplay == 900))
|
||||
return MODE_OK;
|
||||
|
||||
if ((ast->chip == AST2100) || (ast->chip == AST2200) ||
|
||||
(ast->chip == AST2300) || (ast->chip == AST2400) ||
|
||||
(ast->chip == AST2500) || (ast->chip == AST1180)) {
|
||||
if ((hdisplay == 1920) && (vdisplay == 1080))
|
||||
return MODE_OK;
|
||||
|
||||
if ((hdisplay == 1920) && (vdisplay == 1200)) {
|
||||
jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1,
|
||||
0xff);
|
||||
if (jtemp & 0x01)
|
||||
return MODE_NOMODE;
|
||||
else
|
||||
return MODE_OK;
|
||||
}
|
||||
}
|
||||
}
|
||||
switch (hdisplay) {
|
||||
case 640:
|
||||
if (vdisplay == 480)
|
||||
flags = MODE_OK;
|
||||
break;
|
||||
case 800:
|
||||
if (vdisplay == 600)
|
||||
flags = MODE_OK;
|
||||
break;
|
||||
case 1024:
|
||||
if (vdisplay == 768)
|
||||
flags = MODE_OK;
|
||||
break;
|
||||
case 1280:
|
||||
if (vdisplay == 1024)
|
||||
flags = MODE_OK;
|
||||
break;
|
||||
case 1600:
|
||||
if (vdisplay == 1200)
|
||||
flags = MODE_OK;
|
||||
break;
|
||||
default:
|
||||
return flags;
|
||||
}
|
||||
|
||||
return flags;
|
||||
}
|
||||
256
src/drivers/aspeed/common/ast_mode_corebootfb.c
Normal file
256
src/drivers/aspeed/common/ast_mode_corebootfb.c
Normal file
@@ -0,0 +1,256 @@
|
||||
/*
|
||||
* Copied from Linux drivers/gpu/drm/ast/ast_mode.c
|
||||
*
|
||||
* Copyright 2012 Red Hat Inc.
|
||||
* Parts based on xf86-video-ast
|
||||
* Copyright (c) 2005 ASPEED Technology Inc.
|
||||
* Copyright Dave Airlie <airlied@redhat.com>
|
||||
* Copyright 2019 9Elements Agency GmbH <patrick.rudolph@9elements.com>
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the
|
||||
* "Software"), to deal in the Software without restriction, including
|
||||
* without limitation the rights to use, copy, modify, merge, publish,
|
||||
* distribute, sub license, and/or sell copies of the Software, and to
|
||||
* permit persons to whom the Software is furnished to do so, subject to
|
||||
* the following conditions:
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
|
||||
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
|
||||
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
|
||||
* USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* The above copyright notice and this permission notice (including the
|
||||
* next paragraph) shall be included in all copies or substantial portions
|
||||
* of the Software.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <edid.h>
|
||||
|
||||
#include "ast_drv.h"
|
||||
|
||||
/*
|
||||
* Set framebuffer MMIO address, which must fall into BAR0 MMIO window.
|
||||
*
|
||||
* Complete reimplementation as the original expects multiple kernel internal
|
||||
* subsystems to be present.
|
||||
*/
|
||||
int ast_crtc_do_set_base(struct drm_crtc *crtc)
|
||||
{
|
||||
struct ast_private *ast = crtc->dev->dev_private;
|
||||
struct drm_framebuffer *fb = crtc->primary->fb;
|
||||
|
||||
/* PCI BAR 0 */
|
||||
struct resource *res = find_resource(crtc->dev->pdev, 0x10);
|
||||
if (!res) {
|
||||
printk(BIOS_ERR, "BAR0 resource not found.\n");
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
if (res->size < fb->pitches[0] * crtc->mode.vdisplay) {
|
||||
dev_err(dev->pdev, "Framebuffer doesn't fit into BAR0 MMIO window\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
fb->mmio_addr = (u32)res2mmio(res, 4095, 4095);
|
||||
|
||||
ast_set_offset_reg(crtc);
|
||||
ast_set_start_address_crt1(ast, fb->mmio_addr);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void ast_edid_to_drmmode(struct edid *edid, struct drm_display_mode *mode)
|
||||
{
|
||||
memset(mode, 0, sizeof(*mode));
|
||||
|
||||
mode->hdisplay = edid->mode.ha;
|
||||
mode->vdisplay = edid->mode.va;
|
||||
mode->crtc_hdisplay = edid->mode.ha;
|
||||
mode->crtc_vdisplay = edid->mode.va;
|
||||
|
||||
/* EDID clock is in 10kHz, but drm clock is in KHz */
|
||||
mode->clock = edid->mode.pixel_clock * 10;
|
||||
mode->vrefresh = edid->mode.refresh;
|
||||
|
||||
mode->crtc_hblank_start = edid->mode.ha;
|
||||
mode->crtc_hblank_end = edid->mode.ha + edid->mode.hbl;
|
||||
mode->crtc_hsync_start = edid->mode.ha + edid->mode.hso;
|
||||
mode->crtc_hsync_end = edid->mode.ha + edid->mode.hso + edid->mode.hspw;
|
||||
mode->crtc_htotal = mode->crtc_hblank_end;
|
||||
|
||||
mode->crtc_vblank_start = edid->mode.va;
|
||||
mode->crtc_vblank_end = edid->mode.va + edid->mode.vbl;
|
||||
mode->crtc_vsync_start = edid->mode.va + edid->mode.vso;
|
||||
mode->crtc_vsync_end = edid->mode.va + edid->mode.vso + edid->mode.vspw;
|
||||
mode->crtc_vtotal = mode->crtc_vblank_end;
|
||||
|
||||
mode->flags = 0;
|
||||
if (edid->mode.phsync == '+')
|
||||
mode->flags |= DRM_MODE_FLAG_PHSYNC;
|
||||
else
|
||||
mode->flags |= DRM_MODE_FLAG_NHSYNC;
|
||||
|
||||
if (edid->mode.pvsync == '+')
|
||||
mode->flags |= DRM_MODE_FLAG_PVSYNC;
|
||||
else
|
||||
mode->flags |= DRM_MODE_FLAG_NVSYNC;
|
||||
}
|
||||
|
||||
static int ast_select_mode(struct drm_connector *connector,
|
||||
struct edid *edid)
|
||||
{
|
||||
struct ast_private *ast = connector->dev->dev_private;
|
||||
bool widescreen;
|
||||
u8 raw[128];
|
||||
bool flags = false;
|
||||
|
||||
if (ast->tx_chip_type == AST_TX_DP501) {
|
||||
ast->dp501_maxclk = 0xff;
|
||||
flags = ast_dp501_read_edid(connector->dev, (u8 *)raw);
|
||||
if (flags)
|
||||
ast->dp501_maxclk = ast_get_dp501_max_clk(connector->dev);
|
||||
else
|
||||
dev_err(dev->pdev, "I2C transmission error\n");
|
||||
}
|
||||
|
||||
if (!flags)
|
||||
ast_software_i2c_read(ast, raw);
|
||||
|
||||
if (decode_edid(raw, sizeof(raw), edid) != EDID_CONFORMANT) {
|
||||
dev_err(dev->pdev, "Failed to decode EDID\n");
|
||||
printk(BIOS_DEBUG, "Assuming VGA for KVM\n");
|
||||
|
||||
memset(edid, 0, sizeof(*edid));
|
||||
|
||||
edid->mode.pixel_clock = 6411;
|
||||
edid->mode.refresh = 60;
|
||||
edid->mode.ha = 1024;
|
||||
edid->mode.hspw = 4;
|
||||
edid->mode.hso = 56;
|
||||
edid->mode.hbl = 264;
|
||||
edid->mode.phsync = '-';
|
||||
|
||||
edid->mode.va = 768;
|
||||
edid->mode.vspw = 3;
|
||||
edid->mode.vso = 1;
|
||||
edid->mode.vbl = 26;
|
||||
edid->mode.pvsync = '+';
|
||||
}
|
||||
|
||||
printk(BIOS_DEBUG, "AST: Display has %dpx x %dpx\n", edid->mode.ha, edid->mode.va);
|
||||
|
||||
widescreen = !!(((edid->mode.ha * 4) % (edid->mode.va * 3)));
|
||||
|
||||
while (ast_mode_valid(connector, edid->mode.ha, edid->mode.va) != MODE_OK) {
|
||||
/* Select a compatible smaller mode */
|
||||
if (edid->mode.ha > 1920 && widescreen) {
|
||||
edid->mode.ha = 1920;
|
||||
edid->mode.va = 1080;
|
||||
} else if (edid->mode.ha >= 1920 && widescreen) {
|
||||
edid->mode.ha = 1680;
|
||||
edid->mode.va = 1050;
|
||||
} else if (edid->mode.ha >= 1680 && widescreen) {
|
||||
edid->mode.ha = 1600;
|
||||
edid->mode.va = 900;
|
||||
} else if (edid->mode.ha >= 1680 && !widescreen) {
|
||||
edid->mode.ha = 1600;
|
||||
edid->mode.va = 1200;
|
||||
} else if (edid->mode.ha >= 1600 && widescreen) {
|
||||
edid->mode.ha = 1440;
|
||||
edid->mode.va = 900;
|
||||
} else if (edid->mode.ha >= 1440 && widescreen) {
|
||||
edid->mode.ha = 1360;
|
||||
edid->mode.va = 768;
|
||||
} else if (edid->mode.ha >= 1360 && widescreen) {
|
||||
edid->mode.ha = 1280;
|
||||
edid->mode.va = 800;
|
||||
} else if (edid->mode.ha >= 1360 && !widescreen) {
|
||||
edid->mode.ha = 1280;
|
||||
edid->mode.va = 1024;
|
||||
} else if (edid->mode.ha >= 1280) {
|
||||
edid->mode.ha = 1024;
|
||||
edid->mode.va = 768;
|
||||
} else if (edid->mode.ha >= 1024) {
|
||||
edid->mode.ha = 800;
|
||||
edid->mode.va = 600;
|
||||
} else if (edid->mode.ha >= 800) {
|
||||
edid->mode.ha = 640;
|
||||
edid->mode.va = 480;
|
||||
} else {
|
||||
dev_err(dev->pdev, "No compatible mode found.\n");
|
||||
|
||||
return -EIO;
|
||||
}
|
||||
};
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int ast_driver_framebuffer_init(struct drm_device *dev, int flags)
|
||||
{
|
||||
struct drm_display_mode adjusted_mode;
|
||||
struct drm_crtc crtc;
|
||||
struct drm_format format;
|
||||
struct drm_primary primary;
|
||||
struct drm_framebuffer fb;
|
||||
struct drm_connector connector;
|
||||
struct edid edid;
|
||||
int ret;
|
||||
|
||||
/* Init wrapper structs */
|
||||
connector.dev = dev;
|
||||
|
||||
format.cpp[0] = 4; /* 32 BPP */
|
||||
fb.format = &format;
|
||||
|
||||
primary.fb = &fb;
|
||||
|
||||
crtc.dev = dev;
|
||||
crtc.primary = &primary;
|
||||
|
||||
/* Read EDID and find mode */
|
||||
ret = ast_select_mode(&connector, &edid);
|
||||
if (ret) {
|
||||
dev_err(dev->pdev, "Failed to select mode.\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Updated edid for set_vbe_mode_info_valid */
|
||||
edid.x_resolution = edid.mode.ha;
|
||||
edid.y_resolution = edid.mode.va;
|
||||
edid.framebuffer_bits_per_pixel = format.cpp[0] * 8;
|
||||
edid.bytes_per_line = ALIGN_UP(edid.x_resolution * format.cpp[0], 8);
|
||||
|
||||
/* Updated framebuffer info for ast_crtc_mode_set */
|
||||
fb.pitches[0] = edid.bytes_per_line;
|
||||
|
||||
printk(BIOS_DEBUG, "Using framebuffer %dpx x %dpx pitch %d @ %d BPP\n",
|
||||
edid.x_resolution, edid.y_resolution, edid.bytes_per_line,
|
||||
edid.framebuffer_bits_per_pixel);
|
||||
|
||||
/* Convert EDID to AST DRM mode */
|
||||
ast_edid_to_drmmode(&edid, &crtc.mode);
|
||||
|
||||
memcpy(&adjusted_mode, &crtc.mode, sizeof(crtc.mode));
|
||||
|
||||
ret = ast_crtc_mode_set(&crtc, &crtc.mode, &adjusted_mode);
|
||||
if (ret) {
|
||||
dev_err(dev->pdev, "Failed to set mode.\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
ast_hide_cursor(&crtc);
|
||||
|
||||
/* Advertise new mode */
|
||||
set_vbe_mode_info_valid(&edid, fb.mmio_addr);
|
||||
|
||||
/* Clear display */
|
||||
memset((void *)fb.mmio_addr, 0, edid.bytes_per_line * edid.y_resolution);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -49,6 +49,7 @@
|
||||
#define SyncPN (PVSync | NHSync)
|
||||
#define SyncNP (NVSync | PHSync)
|
||||
#define SyncNN (NVSync | NHSync)
|
||||
#define AST2500PreCatchCRT 0x00004000
|
||||
|
||||
/* DCLK Index */
|
||||
#define VCLK25_175 0x00
|
||||
@@ -110,80 +111,110 @@ static struct ast_vbios_dclk_info dclk_table[] = {
|
||||
{0x3b, 0x2c, 0x81}, /* 1A: VCLK118_25 */
|
||||
};
|
||||
|
||||
static const struct ast_vbios_dclk_info dclk_table_ast2500[] = {
|
||||
{0x2C, 0xE7, 0x03}, /* 00: VCLK25_175 */
|
||||
{0x95, 0x62, 0x03}, /* 01: VCLK28_322 */
|
||||
{0x67, 0x63, 0x01}, /* 02: VCLK31_5 */
|
||||
{0x76, 0x63, 0x01}, /* 03: VCLK36 */
|
||||
{0xEE, 0x67, 0x01}, /* 04: VCLK40 */
|
||||
{0x82, 0x62, 0x01}, /* 05: VCLK49_5 */
|
||||
{0xC6, 0x64, 0x01}, /* 06: VCLK50 */
|
||||
{0x94, 0x62, 0x01}, /* 07: VCLK56_25 */
|
||||
{0x80, 0x64, 0x00}, /* 08: VCLK65 */
|
||||
{0x7B, 0x63, 0x00}, /* 09: VCLK75 */
|
||||
{0x67, 0x62, 0x00}, /* 0A: VCLK78_75 */
|
||||
{0x7C, 0x62, 0x00}, /* 0B: VCLK94_5 */
|
||||
{0x8E, 0x62, 0x00}, /* 0C: VCLK108 */
|
||||
{0x85, 0x24, 0x00}, /* 0D: VCLK135 */
|
||||
{0x67, 0x22, 0x00}, /* 0E: VCLK157_5 */
|
||||
{0x6A, 0x22, 0x00}, /* 0F: VCLK162 */
|
||||
{0x4d, 0x4c, 0x80}, /* 10: VCLK154 */
|
||||
{0x68, 0x6f, 0x80}, /* 11: VCLK83.5 */
|
||||
{0x28, 0x49, 0x80}, /* 12: VCLK106.5 */
|
||||
{0x37, 0x49, 0x80}, /* 13: VCLK146.25 */
|
||||
{0x1f, 0x45, 0x80}, /* 14: VCLK148.5 */
|
||||
{0x47, 0x6c, 0x80}, /* 15: VCLK71 */
|
||||
{0x25, 0x65, 0x80}, /* 16: VCLK88.75 */
|
||||
{0x58, 0x01, 0x42}, /* 17: VCLK119 */
|
||||
{0x32, 0x67, 0x80}, /* 18: VCLK85_5 */
|
||||
{0x6a, 0x6d, 0x80}, /* 19: VCLK97_75 */
|
||||
{0x44, 0x20, 0x43}, /* 1A: VCLK118_25 */
|
||||
};
|
||||
|
||||
static struct ast_vbios_stdtable vbios_stdtable[] = {
|
||||
/* MD_2_3_400 */
|
||||
{
|
||||
0x67,
|
||||
{0x00,0x03,0x00,0x02},
|
||||
{0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
|
||||
0x00,0x4f,0x0d,0x0e,0x00,0x00,0x00,0x00,
|
||||
0x9c,0x8e,0x8f,0x28,0x1f,0x96,0xb9,0xa3,
|
||||
0xff},
|
||||
{0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
|
||||
0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
|
||||
0x0c,0x00,0x0f,0x08},
|
||||
{0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
|
||||
0xff}
|
||||
{0x00, 0x03, 0x00, 0x02},
|
||||
{0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
|
||||
0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00,
|
||||
0x9c, 0x8e, 0x8f, 0x28, 0x1f, 0x96, 0xb9, 0xa3,
|
||||
0xff},
|
||||
{0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
|
||||
0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
|
||||
0x0c, 0x00, 0x0f, 0x08},
|
||||
{0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00,
|
||||
0xff}
|
||||
},
|
||||
/* Mode12/ExtEGATable */
|
||||
{
|
||||
0xe3,
|
||||
{0x01,0x0f,0x00,0x06},
|
||||
{0x5f,0x4f,0x50,0x82,0x55,0x81,0x0b,0x3e,
|
||||
0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0xe9,0x8b,0xdf,0x28,0x00,0xe7,0x04,0xe3,
|
||||
0xff},
|
||||
{0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
|
||||
0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
|
||||
0x01,0x00,0x0f,0x00},
|
||||
{0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,
|
||||
0xff}
|
||||
{0x01, 0x0f, 0x00, 0x06},
|
||||
{0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0x0b, 0x3e,
|
||||
0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0xe9, 0x8b, 0xdf, 0x28, 0x00, 0xe7, 0x04, 0xe3,
|
||||
0xff},
|
||||
{0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
|
||||
0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
|
||||
0x01, 0x00, 0x0f, 0x00},
|
||||
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f,
|
||||
0xff}
|
||||
},
|
||||
/* ExtVGATable */
|
||||
{
|
||||
0x2f,
|
||||
{0x01,0x0f,0x00,0x0e},
|
||||
{0x5f,0x4f,0x50,0x82,0x54,0x80,0x0b,0x3e,
|
||||
0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0xea,0x8c,0xdf,0x28,0x40,0xe7,0x04,0xa3,
|
||||
0xff},
|
||||
{0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
|
||||
0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,
|
||||
0x01,0x00,0x00,0x00},
|
||||
{0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,
|
||||
0xff}
|
||||
{0x01, 0x0f, 0x00, 0x0e},
|
||||
{0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0x0b, 0x3e,
|
||||
0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0xea, 0x8c, 0xdf, 0x28, 0x40, 0xe7, 0x04, 0xa3,
|
||||
0xff},
|
||||
{0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
|
||||
0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
|
||||
0x01, 0x00, 0x00, 0x00},
|
||||
{0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0f,
|
||||
0xff}
|
||||
},
|
||||
/* ExtHiCTable */
|
||||
{
|
||||
0x2f,
|
||||
{0x01,0x0f,0x00,0x0e},
|
||||
{0x5f,0x4f,0x50,0x82,0x54,0x80,0x0b,0x3e,
|
||||
0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0xea,0x8c,0xdf,0x28,0x40,0xe7,0x04,0xa3,
|
||||
0xff},
|
||||
{0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
|
||||
0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,
|
||||
0x01,0x00,0x00,0x00},
|
||||
{0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,
|
||||
0xff}
|
||||
{0x01, 0x0f, 0x00, 0x0e},
|
||||
{0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0x0b, 0x3e,
|
||||
0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0xea, 0x8c, 0xdf, 0x28, 0x40, 0xe7, 0x04, 0xa3,
|
||||
0xff},
|
||||
{0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
|
||||
0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
|
||||
0x01, 0x00, 0x00, 0x00},
|
||||
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f,
|
||||
0xff}
|
||||
},
|
||||
/* ExtTrueCTable */
|
||||
{
|
||||
0x2f,
|
||||
{0x01,0x0f,0x00,0x0e},
|
||||
{0x5f,0x4f,0x50,0x82,0x54,0x80,0x0b,0x3e,
|
||||
0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0xea,0x8c,0xdf,0x28,0x40,0xe7,0x04,0xa3,
|
||||
{0x01, 0x0f, 0x00, 0x0e},
|
||||
{0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0x0b, 0x3e,
|
||||
0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0xea, 0x8c, 0xdf, 0x28, 0x40, 0xe7, 0x04, 0xa3,
|
||||
0xff},
|
||||
{0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
|
||||
0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,
|
||||
0x01,0x00,0x00,0x00},
|
||||
{0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,
|
||||
{0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
|
||||
0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
|
||||
0x01, 0x00, 0x00, 0x00},
|
||||
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f,
|
||||
0xff}
|
||||
},
|
||||
};
|
||||
|
||||
static struct ast_vbios_enhtable res_640x480[] = {
|
||||
static const struct ast_vbios_enhtable res_640x480[] = {
|
||||
{ 800, 640, 8, 96, 525, 480, 2, 2, VCLK25_175, /* 60Hz */
|
||||
(SyncNN | HBorder | VBorder | Charx8Dot), 60, 1, 0x2E },
|
||||
{ 832, 640, 16, 40, 520, 480, 1, 3, VCLK31_5, /* 72Hz */
|
||||
@@ -196,7 +227,7 @@ static struct ast_vbios_enhtable res_640x480[] = {
|
||||
(SyncNN | Charx8Dot) , 0xFF, 4, 0x2E },
|
||||
};
|
||||
|
||||
static struct ast_vbios_enhtable res_800x600[] = {
|
||||
static const struct ast_vbios_enhtable res_800x600[] = {
|
||||
{1024, 800, 24, 72, 625, 600, 1, 2, VCLK36, /* 56Hz */
|
||||
(SyncPP | Charx8Dot), 56, 1, 0x30 },
|
||||
{1056, 800, 40, 128, 628, 600, 1, 4, VCLK40, /* 60Hz */
|
||||
@@ -212,7 +243,7 @@ static struct ast_vbios_enhtable res_800x600[] = {
|
||||
};
|
||||
|
||||
|
||||
static struct ast_vbios_enhtable res_1024x768[] = {
|
||||
static const struct ast_vbios_enhtable res_1024x768[] = {
|
||||
{1344, 1024, 24, 136, 806, 768, 3, 6, VCLK65, /* 60Hz */
|
||||
(SyncNN | Charx8Dot), 60, 1, 0x31 },
|
||||
{1328, 1024, 24, 136, 806, 768, 3, 6, VCLK75, /* 70Hz */
|
||||
@@ -225,7 +256,7 @@ static struct ast_vbios_enhtable res_1024x768[] = {
|
||||
(SyncPP | Charx8Dot), 0xFF, 4, 0x31 },
|
||||
};
|
||||
|
||||
static struct ast_vbios_enhtable res_1280x1024[] = {
|
||||
static const struct ast_vbios_enhtable res_1280x1024[] = {
|
||||
{1688, 1280, 48, 112, 1066, 1024, 1, 3, VCLK108, /* 60Hz */
|
||||
(SyncPP | Charx8Dot), 60, 1, 0x32 },
|
||||
{1688, 1280, 16, 144, 1066, 1024, 1, 3, VCLK135, /* 75Hz */
|
||||
@@ -236,7 +267,7 @@ static struct ast_vbios_enhtable res_1280x1024[] = {
|
||||
(SyncPP | Charx8Dot), 0xFF, 3, 0x32 },
|
||||
};
|
||||
|
||||
static struct ast_vbios_enhtable res_1600x1200[] = {
|
||||
static const struct ast_vbios_enhtable res_1600x1200[] = {
|
||||
{2160, 1600, 64, 192, 1250, 1200, 1, 3, VCLK162, /* 60Hz */
|
||||
(SyncPP | Charx8Dot), 60, 1, 0x33 },
|
||||
{2160, 1600, 64, 192, 1250, 1200, 1, 3, VCLK162, /* end */
|
||||
@@ -244,34 +275,39 @@ static struct ast_vbios_enhtable res_1600x1200[] = {
|
||||
};
|
||||
|
||||
/* 16:9 */
|
||||
static struct ast_vbios_enhtable res_1360x768[] = {
|
||||
{1792, 1360, 64,112, 795, 768, 3, 6, VCLK85_5, /* 60Hz */
|
||||
static const struct ast_vbios_enhtable res_1360x768[] = {
|
||||
{1792, 1360, 64, 112, 795, 768, 3, 6, VCLK85_5, /* 60Hz */
|
||||
(SyncPP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 1, 0x39 },
|
||||
{1792, 1360, 64,112, 795, 768, 3, 6, VCLK85_5, /* end */
|
||||
(SyncPP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 0xFF, 1, 0x39 },
|
||||
{1792, 1360, 64, 112, 795, 768, 3, 6, VCLK85_5, /* end */
|
||||
(SyncPP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo |
|
||||
AST2500PreCatchCRT), 0xFF, 1, 0x39 },
|
||||
};
|
||||
|
||||
static struct ast_vbios_enhtable res_1600x900[] = {
|
||||
{1760, 1600, 48, 32, 926, 900, 3, 5, VCLK97_75, /* 60Hz CVT RB */
|
||||
(SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 1, 0x3A },
|
||||
{2112, 1600, 88,168, 934, 900, 3, 5, VCLK118_25, /* 60Hz CVT */
|
||||
static const struct ast_vbios_enhtable res_1600x900[] = {
|
||||
{1760, 1600, 48, 32, 926, 900, 3, 5, VCLK97_75, /* 60Hz CVT RB */
|
||||
(SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo |
|
||||
AST2500PreCatchCRT), 60, 1, 0x3A },
|
||||
{2112, 1600, 88, 168, 934, 900, 3, 5, VCLK118_25, /* 60Hz CVT */
|
||||
(SyncPN | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 2, 0x3A },
|
||||
{2112, 1600, 88,168, 934, 900, 3, 5, VCLK118_25, /* 60Hz CVT */
|
||||
{2112, 1600, 88, 168, 934, 900, 3, 5, VCLK118_25, /* 60Hz CVT */
|
||||
(SyncPN | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 0xFF, 2, 0x3A },
|
||||
};
|
||||
|
||||
static struct ast_vbios_enhtable res_1920x1080[] = {
|
||||
static const struct ast_vbios_enhtable res_1920x1080[] = {
|
||||
{2200, 1920, 88, 44, 1125, 1080, 4, 5, VCLK148_5, /* 60Hz */
|
||||
(SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 1, 0x38 },
|
||||
(SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo |
|
||||
AST2500PreCatchCRT), 60, 1, 0x38 },
|
||||
{2200, 1920, 88, 44, 1125, 1080, 4, 5, VCLK148_5, /* 60Hz */
|
||||
(SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 0xFF, 1, 0x38 },
|
||||
(SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo |
|
||||
AST2500PreCatchCRT), 0xFF, 1, 0x38 },
|
||||
};
|
||||
|
||||
|
||||
/* 16:10 */
|
||||
static struct ast_vbios_enhtable res_1280x800[] = {
|
||||
static const struct ast_vbios_enhtable res_1280x800[] = {
|
||||
{1440, 1280, 48, 32, 823, 800, 3, 6, VCLK71, /* 60Hz RB */
|
||||
(SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 1, 0x35 },
|
||||
(SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo |
|
||||
AST2500PreCatchCRT), 60, 1, 0x35 },
|
||||
{1680, 1280, 72,128, 831, 800, 3, 6, VCLK83_5, /* 60Hz */
|
||||
(SyncPN | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 2, 0x35 },
|
||||
{1680, 1280, 72,128, 831, 800, 3, 6, VCLK83_5, /* 60Hz */
|
||||
@@ -279,29 +315,32 @@ static struct ast_vbios_enhtable res_1280x800[] = {
|
||||
|
||||
};
|
||||
|
||||
static struct ast_vbios_enhtable res_1440x900[] = {
|
||||
static const struct ast_vbios_enhtable res_1440x900[] = {
|
||||
{1600, 1440, 48, 32, 926, 900, 3, 6, VCLK88_75, /* 60Hz RB */
|
||||
(SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 1, 0x36 },
|
||||
(SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo |
|
||||
AST2500PreCatchCRT), 60, 1, 0x36 },
|
||||
{1904, 1440, 80,152, 934, 900, 3, 6, VCLK106_5, /* 60Hz */
|
||||
(SyncPN | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 2, 0x36 },
|
||||
{1904, 1440, 80,152, 934, 900, 3, 6, VCLK106_5, /* 60Hz */
|
||||
(SyncPN | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 0xFF, 2, 0x36 },
|
||||
};
|
||||
|
||||
static struct ast_vbios_enhtable res_1680x1050[] = {
|
||||
static const struct ast_vbios_enhtable res_1680x1050[] = {
|
||||
{1840, 1680, 48, 32, 1080, 1050, 3, 6, VCLK119, /* 60Hz RB */
|
||||
(SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 1, 0x37 },
|
||||
(SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo |
|
||||
AST2500PreCatchCRT), 60, 1, 0x37 },
|
||||
{2240, 1680,104,176, 1089, 1050, 3, 6, VCLK146_25, /* 60Hz */
|
||||
(SyncPN | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 2, 0x37 },
|
||||
{2240, 1680,104,176, 1089, 1050, 3, 6, VCLK146_25, /* 60Hz */
|
||||
(SyncPN | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 0xFF, 2, 0x37 },
|
||||
};
|
||||
|
||||
static struct ast_vbios_enhtable res_1920x1200[] = {
|
||||
static const struct ast_vbios_enhtable res_1920x1200[] = {
|
||||
{2080, 1920, 48, 32, 1235, 1200, 3, 6, VCLK154, /* 60Hz RB*/
|
||||
(SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 1, 0x34 },
|
||||
{2080, 1920, 48, 32, 1235, 1200, 3, 6, VCLK154, /* 60Hz RB */
|
||||
(SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 0xFF, 1, 0x34 },
|
||||
(SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo |
|
||||
AST2500PreCatchCRT), 60, 1, 0x34 },
|
||||
{2080, 1920, 48, 32, 1235, 1200, 3, 6, VCLK154, /* 60Hz RB */
|
||||
(SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo |
|
||||
AST2500PreCatchCRT), 0xFF, 1, 0x34 },
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
Reference in New Issue
Block a user