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mb/amd/bilby,cereme,mandolin: change PSPP policy to balanced

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Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I7571ed92b3c3fa79581e2c7342960ca31451af1f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54935
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
This commit is contained in:
Felix Held
2021-05-25 21:20:00 +02:00
parent 71099258cc
commit f3819bdf2e
3 changed files with 3 additions and 3 deletions
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2
src/mainboard/amd/bilby/devicetree.cb
View File

@@ -136,7 +136,7 @@ chip soc/amd/picasso
register "gpp_clk_config[5]" = "GPP_CLK_REQ"
register "gpp_clk_config[6]" = "GPP_CLK_REQ"
register "pspp_policy" = "DXIO_PSPP_POWERSAVE"
register "pspp_policy" = "DXIO_PSPP_BALANCED"
device cpu_cluster 0 on
device lapic 0 on end

2
src/mainboard/amd/mandolin/variants/cereme/devicetree.cb
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@@ -136,7 +136,7 @@ chip soc/amd/picasso
register "gpp_clk_config[5]" = "GPP_CLK_OFF"
register "gpp_clk_config[6]" = "GPP_CLK_OFF"
register "pspp_policy" = "DXIO_PSPP_POWERSAVE"
register "pspp_policy" = "DXIO_PSPP_BALANCED"
device cpu_cluster 0 on
device lapic 0 on end

2
src/mainboard/amd/mandolin/variants/mandolin/devicetree.cb
View File

@@ -136,7 +136,7 @@ chip soc/amd/picasso
register "gpp_clk_config[5]" = "GPP_CLK_REQ"
register "gpp_clk_config[6]" = "GPP_CLK_REQ"
register "pspp_policy" = "DXIO_PSPP_POWERSAVE"
register "pspp_policy" = "DXIO_PSPP_BALANCED"
device cpu_cluster 0 on
device lapic 0 on end